From patchwork Wed Aug 8 14:18:34 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramana Radhakrishnan X-Patchwork-Id: 10587 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id A788923EB4 for ; Wed, 8 Aug 2012 14:18:37 +0000 (UTC) Received: from mail-gh0-f180.google.com (mail-gh0-f180.google.com [209.85.160.180]) by fiordland.canonical.com (Postfix) with ESMTP id 57DD0A187CD for ; Wed, 8 Aug 2012 14:18:37 +0000 (UTC) Received: by ghbg10 with SMTP id g10so810866ghb.11 for ; Wed, 08 Aug 2012 07:18:36 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf :mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:x-gm-message-state; bh=td65U2gOcuE1RdhaVHji8VUixhuBLCNi7rHt7GDaPH8=; b=JXhpvSet0A5aqiNFQb3mewZob6vFF6G9wsN+eCwCBMwZeAuiSkA/5Q0jstSaPK7UB8 ftvNtWCq1zBJM2028g2yC1FC0XfO0bs/uAs4CoZTKg65okaIKkd6mmyY+WMNrUyLGOVZ pl0TGwWma3lKAPCd5atv8Q1x6rYBc9fWa6PQqPH9Fu6ZSQWCKMmgeeBVmBrqjcbho7pk 83wqGHi59NEDKFaGNmmODH4uy1DgpvNnI+aTa9FBZ8XUzXd9SzYWyMjiSVsTmxPeiOV/ KBOqyGo3vwWX6JWUqvNTRE2ZBjlQ3P3WYFBGLktQvobg82dwaZgEs9klLpJmUcYCWOgO GFug== Received: by 10.50.6.229 with SMTP id e5mr1164341iga.9.1344435516593; Wed, 08 Aug 2012 07:18:36 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.184.200 with SMTP id ew8csp609987igc; Wed, 8 Aug 2012 07:18:36 -0700 (PDT) Received: by 10.52.70.116 with SMTP id l20mr123451vdu.74.1344435515408; Wed, 08 Aug 2012 07:18:35 -0700 (PDT) Received: from mail-vb0-f50.google.com (mail-vb0-f50.google.com [209.85.212.50]) by mx.google.com with ESMTPS id jr5si7136271vcb.174.2012.08.08.07.18.34 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 08 Aug 2012 07:18:35 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.212.50 is neither permitted nor denied by best guess record for domain of ramana.radhakrishnan@linaro.org) client-ip=209.85.212.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.50 is neither permitted nor denied by best guess record for domain of ramana.radhakrishnan@linaro.org) smtp.mail=ramana.radhakrishnan@linaro.org Received: by vbal1 with SMTP id l1so985136vba.37 for ; Wed, 08 Aug 2012 07:18:34 -0700 (PDT) MIME-Version: 1.0 Received: by 10.58.32.234 with SMTP id m10mr13811817vei.60.1344435514645; Wed, 08 Aug 2012 07:18:34 -0700 (PDT) Received: by 10.58.187.170 with HTTP; Wed, 8 Aug 2012 07:18:34 -0700 (PDT) In-Reply-To: <501BE78B.8040306@arm.com> References: <501BE78B.8040306@arm.com> Date: Wed, 8 Aug 2012 15:18:34 +0100 Message-ID: Subject: Re: [Patch ARM 1/6] Canonicalize neon_vaba and neon_vabal patterns. From: Ramana Radhakrishnan To: Richard Earnshaw Cc: "gcc-patches@gcc.gnu.org" , Patch Tracking X-Gm-Message-State: ALoCoQnxkNrpzegsrC//Sk4C0xWoNygOtjWdlKVZLxQSy/WFbZbQk0smbOpCKdz36hLaGw9yLiaE On 3 August 2012 16:00, Richard Earnshaw wrote: > On 30/07/12 12:43, Ramana Radhakrishnan wrote: >>> Patch 1 fixes up the vaba and vabal patterns to use a canonical RTL >>> form with the first operand to the plus being the more complex one. >> >> This patch canonicalizes the instruction patterns for the >> vaba and vabal intrinsics so that the more complex operand >> to plus is the first operand. This prevents needless >> splitting in combine. >> >> For reference, this was found by the new test in gcc.target/neon/vaba*.c >> and gcc.target/neon/vabal*.c from patch #4. >> >> >> Ok ? >> >> regards, >> Ramana >> >> 2012-07-27 Ramana Radhakrishnan >> >> * config/arm/neon.md (neon_vaba): Change to define_expand. >> (neon_vabal): Likewise. >> (neon_vaba_internal): New internal pattern. >> (neon_vabal_internal): New internal pattern. > > In principle, this is OK. I think you could have achieved the same > effect more simply though by just re-ordering the RTL but keeping the > operand numbers the same. Indeed - this look better ? "TARGET_NEON" "vaba.%T4%#\t%0, %2, %3" [(set (attr "neon_type") @@ -2351,13 +2351,13 @@ (define_insn "neon_vabal" [(set (match_operand: 0 "s_register_operand" "=w") - (plus: (match_operand: 1 "s_register_operand" "0") - (unspec: [(match_operand:VW 2 "s_register_operand" "w") - (match_operand:VW 3 "s_register_operand" "w") - (match_operand:SI 4 "immediate_operand" "i")] - UNSPEC_VABDL)))] + (plus: (unspec: + [(match_operand:VW 2 "s_register_operand" "w") + (match_operand:VW 3 "s_register_operand" "w") + (match_operand:SI 4 "immediate_operand" "i")] UNSPEC_VABDL) + (match_operand: 1 "s_register_operand" "0")))] "TARGET_NEON" - "vabal.%T4%#\t%q0, %P2, %P3" + "vabal.%T4%#\t%q0, %P1, %P2" [(set_attr "neon_type" "neon_vaba")] ) Ramana diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index 7142c98..9e82564 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -2337,11 +2337,11 @@ (define_insn "neon_vaba" [(set (match_operand:VDQIW 0 "s_register_operand" "=w") - (plus:VDQIW (match_operand:VDQIW 1 "s_register_operand" "0") - (unspec:VDQIW [(match_operand:VDQIW 2 "s_register_operand" "w") - (match_operand:VDQIW 3 "s_register_operand" "w") - (match_operand:SI 4 "immediate_operand" "i")] - UNSPEC_VABD)))] + (plus:VDQIW (unspec:VDQIW + [(match_operand:VDQIW 2 "s_register_operand" "w") + (match_operand:VDQIW 3 "s_register_operand" "w") + (match_operand:SI 4 "immediate_operand" "i")] UNSPEC_VABD) + (match_operand:VDQIW 1 "s_register_operand" "0")))]