From patchwork Fri Dec 28 01:02:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 154579 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp7504352ljp; Thu, 27 Dec 2018 17:03:31 -0800 (PST) X-Google-Smtp-Source: AFSGD/WXSrQ5TBj6P5n2yXN0RxJjwtK29MwkFM6oUrMAPsZwC1O4b45EPj0G7ArGa8Vl3K5u+Uyg X-Received: by 2002:a62:6303:: with SMTP id x3mr26912552pfb.110.1545959011844; Thu, 27 Dec 2018 17:03:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545959011; cv=none; d=google.com; s=arc-20160816; b=KWjxONvT1SoHqFnV4G356uTGN655kIf360BFpKipKhcHRUNtnVCgZ2mR2tW9YJkv6C 37HK47vcpN4ZMX8FjaxlC99kFaFZjk4NrCqIj1BdZbffsBMcd2/kxfnmgpO+9nQb8Krs eHbt59rFObq1cyUXjn33a5MgPZF9YhBeUQg5pOlUro9tqDyHAnir2Cz54gzsaDoyZy8T yQS2hODFBQ4hMmxvPbRrpS6v6Qo++fBnZn5Du8PTEik8jMH11m+pCXfmpaxLkiT2mDEV hxja8aGNxX5UfDP9ETdwj+Z/l9dpm0iE1G5ToEEKCMlbMSX0EQDlLa+Zo0g49ChvtY5T y6Ow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from :dkim-signature:delivered-to:sender:list-help:list-post:list-archive :list-subscribe:list-unsubscribe:list-id:precedence:mailing-list :dkim-signature:domainkey-signature; bh=gzhUnGrl2CIILyE/qLsnzPtwIrjHGrO0EU8entvzrpg=; b=WKzXi8xPl2Y8ytQxENU42vG+5qBjWwCO60yoT73/mMIIeej98Cbe75+v8OWjsBFXy2 5C4MY4DvbT/r8P375rpV/FUw9Je4Wp7amtAvB9wtFInO3XUqiLucApu0ggEtvPTnFdqZ 8qd7XdKNM9Z4dZvsDZcrfK21W6rV9TKp7fSQFhMelo//HiKghxdqMdpyVBrJNMVYXNay 6to7E2xP4mEAcBOEB6M3nk+FXvaioGWDMmZ2lNuWkBYsoO9TIQiuzOlcsI1EzORITWXA IGOhmkCHKds1JyodCSUjR/WaLhFtexowm/Q7xy8u1+8hw6ONunm/ic/EjGFSdoK6D5dr Rseg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=TqjQLyYi; dkim=pass header.i=@linaro.org header.s=google header.b="JDNYY/OS"; spf=pass (google.com: domain of libc-alpha-return-98815-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="libc-alpha-return-98815-patch=linaro.org@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id q70si36578932pgq.526.2018.12.27.17.03.31 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 27 Dec 2018 17:03:31 -0800 (PST) Received-SPF: pass (google.com: domain of libc-alpha-return-98815-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=TqjQLyYi; dkim=pass header.i=@linaro.org header.s=google header.b="JDNYY/OS"; spf=pass (google.com: domain of libc-alpha-return-98815-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="libc-alpha-return-98815-patch=linaro.org@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=JzgtW3BgVv8vZsaW8odaQGxWucaF0OU zBy5i02Ne6coGY55Ij706r1KuptROiyq1efqjh5t5201W+3XqSFSEFGKzQ046Xwq YJDritT54wUzwMkh+jsxoTFxgSo3/7kDv4naNVlJRE0X+mDU+9glZJldo/BfxJzo XzmXpAHXiuQk= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=J3wIIrY3fxfSAaeR/zeqglPu78M=; b=TqjQL yYi8v0k8y6tv+SrDZ4UeTx9ucRuNd0YIaEIUkijYICXoaYG8wpG7DN0UwwG8x8w4 O3T/GhkN0aDRxBhEa9XGOB531adOdzDuv8h79PjvTMw2qej7SX7IE/1X7Jhkvgka hJlHstR3gYS4Nxbsa+kYaSh3Qx5IkCGbVG+KGM= Received: (qmail 35341 invoked by alias); 28 Dec 2018 01:03:08 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 35236 invoked by uid 89); 28 Dec 2018 01:03:08 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy=exchange, lock, optimize, indicated X-HELO: mail-qk1-f195.google.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references; bh=gzhUnGrl2CIILyE/qLsnzPtwIrjHGrO0EU8entvzrpg=; b=JDNYY/OSU/GrdDeA5zPTk7hbiblSZQ4p6Y3JNfp1C2/loxggj75fZ49QLJAAWwM1QD X3tEUKBo71W2zRKEknJMlVeW7hNst5vlY6gyhVCIahFFRfV9bwkcDJk2p0F1ebejeoLy F6npfn9FjaP9gjyYpTi9qJhb3onxdmNG4ZjgI= Return-Path: From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH v2 3/6] x86: Remove wrong THREAD_ATOMIC_* macros Date: Thu, 27 Dec 2018 23:02:52 -0200 Message-Id: <20181228010255.21406-4-adhemerval.zanella@linaro.org> In-Reply-To: <20181228010255.21406-1-adhemerval.zanella@linaro.org> References: <20181228010255.21406-1-adhemerval.zanella@linaro.org> The x86 defines optimized THREAD_ATOMIC_* macros where reference always the current thread instead of the one indicated by input 'descr' argument. It work as long the input is the self thread pointer, however it generates wrong code is the semantic is to set a bit atomicialy from another thread. This is not an issue for current GLIBC usage, however the new cancellation code expects that some synchronization code to atomically set bits from different threads. The generic code generates an additional load to reference to TLS segment, for instance the code: THREAD_ATOMIC_BIT_SET (THREAD_SELF, cancelhandling, CANCELED_BIT); Compiles to: lock;orl $4, %fs:776 Where with patch changes it now compiles to: mov %fs:16,%rax lock;orl $4, 776(%rax) If some usage indeed proves to be a hotspot we can add an extra macro with a more descriptive name (THREAD_ATOMIC_BIT_SET_SELF for instance) where x86_64 might optimize it. Checked on x86_64-linux-gnu. * sysdeps/x86_64/nptl/tls.h (THREAD_ATOMIC_CMPXCHG_VAL, THREAD_ATOMIC_AND, THREAD_ATOMIC_BIT_SET): Remove macros. --- ChangeLog | 3 +++ sysdeps/x86_64/nptl/tls.h | 37 ------------------------------------- 2 files changed, 3 insertions(+), 37 deletions(-) -- 2.17.1 diff --git a/sysdeps/x86_64/nptl/tls.h b/sysdeps/x86_64/nptl/tls.h index e88561c934..835a0d3deb 100644 --- a/sysdeps/x86_64/nptl/tls.h +++ b/sysdeps/x86_64/nptl/tls.h @@ -306,43 +306,6 @@ _Static_assert (offsetof (tcbhead_t, __glibc_unused2) == 0x80, }}) -/* Atomic compare and exchange on TLS, returning old value. */ -# define THREAD_ATOMIC_CMPXCHG_VAL(descr, member, newval, oldval) \ - ({ __typeof (descr->member) __ret; \ - __typeof (oldval) __old = (oldval); \ - if (sizeof (descr->member) == 4) \ - asm volatile (LOCK_PREFIX "cmpxchgl %2, %%fs:%P3" \ - : "=a" (__ret) \ - : "0" (__old), "r" (newval), \ - "i" (offsetof (struct pthread, member))); \ - else \ - /* Not necessary for other sizes in the moment. */ \ - abort (); \ - __ret; }) - - -/* Atomic logical and. */ -# define THREAD_ATOMIC_AND(descr, member, val) \ - (void) ({ if (sizeof ((descr)->member) == 4) \ - asm volatile (LOCK_PREFIX "andl %1, %%fs:%P0" \ - :: "i" (offsetof (struct pthread, member)), \ - "ir" (val)); \ - else \ - /* Not necessary for other sizes in the moment. */ \ - abort (); }) - - -/* Atomic set bit. */ -# define THREAD_ATOMIC_BIT_SET(descr, member, bit) \ - (void) ({ if (sizeof ((descr)->member) == 4) \ - asm volatile (LOCK_PREFIX "orl %1, %%fs:%P0" \ - :: "i" (offsetof (struct pthread, member)), \ - "ir" (1 << (bit))); \ - else \ - /* Not necessary for other sizes in the moment. */ \ - abort (); }) - - /* Set the stack guard field in TCB head. */ # define THREAD_SET_STACK_GUARD(value) \ THREAD_SETMEM (THREAD_SELF, header.stack_guard, value)