From patchwork Thu Dec 12 05:12:32 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: panchaxari X-Patchwork-Id: 22269 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-oa0-f70.google.com (mail-oa0-f70.google.com [209.85.219.70]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id C58D323FC9 for ; Thu, 12 Dec 2013 05:13:21 +0000 (UTC) Received: by mail-oa0-f70.google.com with SMTP id m1sf28679827oag.1 for ; Wed, 11 Dec 2013 21:13:20 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=3nSEjpAC8CCLxPEW+EqVmz2pfIhLt8ttQME7VQx+SB0=; b=N3HigLgG6fpU1mPZQK0w9zf93obH3krDSSoq/nU9krXvUvMncVTL2uhYuOSpzJXlmH WBd+MequP7WC9Q5tg26A66q9EON0BHl37hxvx2V7weFULivvtRrFCJNqDczvs1gAMN67 81ERV3zV1mRSjFAFN8WnRYNxyrIjftB33h82qNn/ECvkkbdUf8Hi4An5CVU9vYnj77gD R+mWcgqNFa2ZZRE5sVClOmApDY15Kbvb4XNnSNInsT89zqw2Jr/4NXMwvxC/6Vt7HGnQ 9Zl5f6Y8zAjg6TAhm7s2BzAE2mYrAPm4VctMx64Ln7COET6+ficlvJSnakNbd3YEzIvu uLdg== X-Gm-Message-State: ALoCoQlUaA6kkAdfdC7+jYfXy8gVQRLbMjWsPPOtf41Kzr5//ZAiKoSlWG3wueM3r/4kCyvpQapr X-Received: by 10.182.22.133 with SMTP id d5mr2191401obf.27.1386825200663; Wed, 11 Dec 2013 21:13:20 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.48.129 with SMTP id l1ls333428qen.75.gmail; Wed, 11 Dec 2013 21:13:20 -0800 (PST) X-Received: by 10.58.39.97 with SMTP id o1mr2347238vek.15.1386825200509; Wed, 11 Dec 2013 21:13:20 -0800 (PST) Received: from mail-vb0-f49.google.com (mail-vb0-f49.google.com [209.85.212.49]) by mx.google.com with ESMTPS id ta5si7267275veb.69.2013.12.11.21.13.20 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 11 Dec 2013 21:13:20 -0800 (PST) Received-SPF: neutral (google.com: 209.85.212.49 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.212.49; Received: by mail-vb0-f49.google.com with SMTP id x11so2349844vbb.36 for ; Wed, 11 Dec 2013 21:13:20 -0800 (PST) X-Received: by 10.58.50.194 with SMTP id e2mr4946veo.54.1386825200138; Wed, 11 Dec 2013 21:13:20 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp326234vcz; Wed, 11 Dec 2013 21:13:19 -0800 (PST) X-Received: by 10.68.189.101 with SMTP id gh5mr8384602pbc.39.1386825197359; Wed, 11 Dec 2013 21:13:17 -0800 (PST) Received: from mail-pd0-f176.google.com (mail-pd0-f176.google.com [209.85.192.176]) by mx.google.com with ESMTPS id sl10si15487834pab.70.2013.12.11.21.13.16 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 11 Dec 2013 21:13:17 -0800 (PST) Received-SPF: neutral (google.com: 209.85.192.176 is neither permitted nor denied by best guess record for domain of panchaxari.prasannamurthy@linaro.org) client-ip=209.85.192.176; Received: by mail-pd0-f176.google.com with SMTP id w10so10832004pde.7 for ; Wed, 11 Dec 2013 21:13:16 -0800 (PST) X-Received: by 10.68.204.199 with SMTP id la7mr7472226pbc.66.1386825196711; Wed, 11 Dec 2013 21:13:16 -0800 (PST) Received: from si-panchaxari.LGE.NET ([203.247.149.152]) by mx.google.com with ESMTPSA id sy10sm51037029pac.15.2013.12.11.21.13.10 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 11 Dec 2013 21:13:16 -0800 (PST) From: panchaxari To: kgene.kim@samsung.com Cc: patches@linaro.org, linaro-kernel@lists.linaro.org, panchaxari.prasannamurthy@linaro.org, Tomasz Figa , Sylwester Nawrocki , Heiko Stuebner , Russell King , Linus Walleij , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH CFT] ARM:S5P64X0: Enable ARM_PATCH_PHYS_VIRT and AUTO_ZRELADDR by default Date: Thu, 12 Dec 2013 10:42:32 +0530 Message-Id: <1386825152-398-1-git-send-email-panchaxari.prasannamurthy@linaro.org> X-Mailer: git-send-email 1.7.10.4 X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: panchaxari.prasannamurthy@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.49 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , ARM_PATCH_PHYS_VIRT and AUTO_ZRELADDR have been enabled as default configs to S5P64X0 platforms. Introduction of PHYS_VIRT config as default would enable phy-to-virt and virt-to-phy translation function at boot and module loading time and enforce dynamic reallocation of memory. AUTO_ZRELADDR config would enable calculation of kernel load address at run time. PHYS_VIRT config is mutually exclusive to XIP_KERNEL, XIP_KERNEL is used in systems with NOR flash devices, and ZRELADDR config is mutually exclusive to ZBOOT_ROM. CFT::Call For Testing Requesting maintainers of S5P64X0 platforms to evaluate the changes on the board and comment, as I dont have the board for testing and also requesting an ACK Signed-off-by: panchaxari Cc: Kukjin Kim Cc: Tomasz Figa Cc: Sylwester Nawrocki Cc: Heiko Stuebner Cc: Russell King Cc: Linus Walleij Cc: linux-arm-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- The samsung S5P64X0 vega has an average performing CPU with max speed 667 Mhz. This SOC has two variants S5P6440 and S5P6450. It has one core based on ARM1176JZF-S instruction set, and has 16KB data and instruction cache each. SOC has a memory subsystem with support to NAND Flash interface with x8 data bus, with 1/4/8/12/16 bit hardware ECC circuit and 4KB Page mode. It has Mobile DDR interface with x16 or x32 data bus, and DDR2 interface with x16 or x32 data bus it also supports eMMC4.4. Below lkml link is a quoting by Russell which clears the concept of PHYS_VIRT and ZRELADDR ------------------------------------------------- https://lkml.org/lkml/2011/10/14/434 ------------------------------------------------- --- arch/arm/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 934e26c..8986335 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -759,6 +759,8 @@ config ARCH_S3C64XX config ARCH_S5P64X0 bool "Samsung S5P6440 S5P6450" + select ARM_PATCH_PHYS_VIRT + select AUTO_ZRELADDR select CLKDEV_LOOKUP select CLKSRC_SAMSUNG_PWM select CPU_V6