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[91.189.95.16]) by mx.google.com with ESMTP id w31si13385820wen.33.2012.08.20.03.48.11; Mon, 20 Aug 2012 03:48:13 -0700 (PDT) Received-SPF: neutral (google.com: 91.189.95.16 is neither permitted nor denied by best guess record for domain of linaro-mm-sig-bounces@lists.linaro.org) client-ip=91.189.95.16; Authentication-Results: mx.google.com; spf=neutral (google.com: 91.189.95.16 is neither permitted nor denied by best guess record for domain of linaro-mm-sig-bounces@lists.linaro.org) smtp.mail=linaro-mm-sig-bounces@lists.linaro.org Received: from localhost ([127.0.0.1] helo=mombin.canonical.com) by mombin.canonical.com with esmtp (Exim 4.71) (envelope-from ) id 1T3PWk-0001Af-UV; Mon, 20 Aug 2012 10:48:11 +0000 Received: from mailout1.samsung.com ([203.254.224.24]) by mombin.canonical.com with esmtp (Exim 4.71) (envelope-from ) id 1T3PWj-0001AO-Bo for linaro-mm-sig@lists.linaro.org; Mon, 20 Aug 2012 10:48:09 +0000 Received: from epcpsbgm2.samsung.com (mailout1.samsung.com [203.254.224.24]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0M9100FYMVBP51P0@mailout1.samsung.com> for linaro-mm-sig@lists.linaro.org; Mon, 20 Aug 2012 19:48:07 +0900 (KST) X-AuditID: cbfee61b-b7faf6d00000476a-39-503215e6dda0 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 87.4B.18282.6E512305; Mon, 20 Aug 2012 19:48:06 +0900 (KST) Received: from mcdsrvbld02.digital.local ([106.116.37.23]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0M91008OAVBT1S40@mmp2.samsung.com> for linaro-mm-sig@lists.linaro.org; Mon, 20 Aug 2012 19:48:06 +0900 (KST) From: Marek Szyprowski To: linux-arm-kernel@lists.infradead.org, linaro-mm-sig@lists.linaro.org Date: Mon, 20 Aug 2012 12:47:26 +0200 Message-id: <1345459648-24263-2-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.7.10 In-reply-to: <1345459648-24263-1-git-send-email-m.szyprowski@samsung.com> References: <1345459648-24263-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrMJMWRmVeSWpSXmKPExsVy+t9jQd1nokYBBpN32Fh8ufKQyYHR4/a/ x8wBjFFcNimpOZllqUX6dglcGd1TfjMWLBSp+NR+mqmB8ZRAFyMnh4SAicSet2cZIWwxiQv3 1rN1MXJxCAlMZ5SY8f0AO4Szlkni48cNTCBVbAKGEl1vu9hAbBEBD4knK84xgxQxCxxikpj6 fBdYkbBAusSl5sesIDaLgKrE0tZ9YCt4gRpm7G1lhlgnL/H0fh/QIA4OTgFPiRnrq0HCQkAl ax5fZp3AyLuAkWEVo2hqQXJBcVJ6rpFecWJucWleul5yfu4mRrDXn0nvYFzVYHGIUYCDUYmH t3CqYYAQa2JZcWXuIUYJDmYlEd4/IkYBQrwpiZVVqUX58UWlOanFhxilOViUxHn5+4CqBdIT S1KzU1MLUotgskwcnFINjKabQ9YxlHy5EK7xQbc7etMa9mNT9hy9ouF6XbyQS/Jib1J5vICt sROTrX7KGh+Ftm0W/tXPkuZki7K0iyV8vBl05KLM7CdcOsWff2Y7zXbaMzPma/GSA7kBtr6K wbdbj0/3FZp0pr5BZJnKr4WH/uc5CtSztB7RTeSVTnTKPHL3+p55M54EK7EUZyQaajEXFScC ALDYHu32AQAA X-TM-AS-MML: No Cc: Andrew Lunn , Russell King - ARM Linux , Jason Cooper , Arnd Bergmann , Aaro Koskinen , Josh Coombs , Kyungmin Park Subject: [Linaro-mm-sig] [PATCH 1/3] ARM: DMA-Mapping: add function for setting coherent pool size from platform code X-BeenThere: linaro-mm-sig@lists.linaro.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: "Unified memory management interest group." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linaro-mm-sig-bounces@lists.linaro.org Errors-To: linaro-mm-sig-bounces@lists.linaro.org X-Gm-Message-State: ALoCoQmsXvQmy0Ylsr0fQTdcDOgFw/LZL/QbAOjU5O4GCMsXtlgsRBsyEbovcuU4iQGv4xITA9JP Some platforms might require to increase atomic coherent pool to make sure that their device will be able to allocate all their buffers from atomic context. This function can be also used to decrease atomic coherent pool size if coherent allocations are not used for the given sub-platform. Suggested-by: Josh Coombs Signed-off-by: Marek Szyprowski --- arch/arm/include/asm/dma-mapping.h | 7 +++++++ arch/arm/mm/dma-mapping.c | 19 ++++++++++++++++++- 2 files changed, 25 insertions(+), 1 deletions(-) diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h index 2ae842d..a53940d 100644 --- a/arch/arm/include/asm/dma-mapping.h +++ b/arch/arm/include/asm/dma-mapping.h @@ -203,6 +203,13 @@ static inline void dma_free_writecombine(struct device *dev, size_t size, } /* + * This can be called during early boot to increase the size of the atomic + * coherent DMA pool above the default value of 256KiB. It must be called + * before postcore_initcall. + */ +extern void __init init_dma_coherent_pool_size(unsigned long size); + +/* * This can be called during boot to increase the size of the consistent * DMA region above it's default value of 2MB. It must be called before the * memory allocator is initialised, i.e. before any core_initcall. diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index 4e7d118..d1cc9c1 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -267,6 +267,8 @@ static void __dma_free_remap(void *cpu_addr, size_t size) vunmap(cpu_addr); } +#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K + struct dma_pool { size_t size; spinlock_t lock; @@ -277,7 +279,7 @@ struct dma_pool { }; static struct dma_pool atomic_pool = { - .size = SZ_256K, + .size = DEFAULT_DMA_COHERENT_POOL_SIZE, }; static int __init early_coherent_pool(char *p) @@ -287,6 +289,21 @@ static int __init early_coherent_pool(char *p) } early_param("coherent_pool", early_coherent_pool); +void __init init_dma_coherent_pool_size(unsigned long size) +{ + /* + * Catch any attempt to set the pool size too late. + */ + BUG_ON(atomic_pool.vaddr); + + /* + * Set architecture specific coherent pool size only if + * it has not been changed by kernel command line parameter. + */ + if (atomic_pool.size == DEFAULT_DMA_COHERENT_POOL_SIZE) + atomic_pool.size = size; +} + /* * Initialise the coherent pool for atomic allocations. */