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[91.189.95.16]) by mx.google.com with ESMTP id ha10si12119320bkc.103.2012.08.27.22.15.44; Mon, 27 Aug 2012 22:15:46 -0700 (PDT) Received-SPF: neutral (google.com: 91.189.95.16 is neither permitted nor denied by best guess record for domain of linaro-mm-sig-bounces@lists.linaro.org) client-ip=91.189.95.16; Authentication-Results: mx.google.com; spf=neutral (google.com: 91.189.95.16 is neither permitted nor denied by best guess record for domain of linaro-mm-sig-bounces@lists.linaro.org) smtp.mail=linaro-mm-sig-bounces@lists.linaro.org Received: from localhost ([127.0.0.1] helo=mombin.canonical.com) by mombin.canonical.com with esmtp (Exim 4.71) (envelope-from ) id 1T6E9O-0004iC-V1; Tue, 28 Aug 2012 05:15:43 +0000 Received: from hqemgate04.nvidia.com ([216.228.121.35]) by mombin.canonical.com with esmtp (Exim 4.71) (envelope-from ) id 1T6E9N-0004hA-AF for linaro-mm-sig@lists.linaro.org; Tue, 28 Aug 2012 05:15:41 +0000 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate04.nvidia.com id ; Mon, 27 Aug 2012 22:14:50 -0700 Received: from hqemhub02.nvidia.com ([172.17.108.22]) by hqnvupgp08.nvidia.com (PGP Universal service); Mon, 27 Aug 2012 22:15:29 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Mon, 27 Aug 2012 22:15:29 -0700 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server id 8.3.264.0; Mon, 27 Aug 2012 22:13:28 -0700 Received: from thelma.nvidia.com (Not Verified[172.16.212.77]) by hqnvemgw01.nvidia.com with MailMarshal (v6,7,2,8378) id ; Mon, 27 Aug 2012 22:13:28 -0700 Received: from oreo.Nvidia.com (dhcp-10-21-25-186.nvidia.com [10.21.25.186]) by thelma.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id q7S5D9NY003531; Mon, 27 Aug 2012 22:13:24 -0700 (PDT) From: Hiroshi Doyu To: Date: Tue, 28 Aug 2012 08:13:03 +0300 Message-ID: <1346130784-23571-4-git-send-email-hdoyu@nvidia.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1346130784-23571-1-git-send-email-hdoyu@nvidia.com> References: <1346130784-23571-1-git-send-email-hdoyu@nvidia.com> MIME-Version: 1.0 Cc: linux@arm.linux.org.uk, arnd@arndb.de, minchan@kernel.org, konrad.wilk@oracle.com, linux-kernel@vger.kernel.org, linaro-mm-sig@lists.linaro.org, linux-mm@kvack.org, kyungmin.park@samsung.com, linux-tegra@vger.kernel.org, pullip.cho@samsung.com, linux-arm-kernel@lists.infradead.org Subject: [Linaro-mm-sig] [v4 3/4] ARM: dma-mapping: Introduce __atomic_get_pages() for __iommu_get_pages() X-BeenThere: linaro-mm-sig@lists.linaro.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: "Unified memory management interest group." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linaro-mm-sig-bounces@lists.linaro.org Errors-To: linaro-mm-sig-bounces@lists.linaro.org X-Gm-Message-State: ALoCoQmKvPqpKA623nrvcyqRRECarycWRPkhw2nsRnH0wZkjlNvMwxpUA162VS4sd1PD0BUiaBuq Support atomic allocation in __iommu_get_pages(). Signed-off-by: Hiroshi Doyu --- arch/arm/mm/dma-mapping.c | 12 ++++++++++++ 1 files changed, 12 insertions(+), 0 deletions(-) diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index a62f552..4ef2d7b 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -503,6 +503,15 @@ static void *__alloc_from_pool(size_t size, struct page **ret_page) return ptr; } +static struct page **__atomic_get_pages(void *addr) +{ + struct dma_pool *pool = &atomic_pool; + struct page **pages = pool->pages; + int offs = (addr - pool->vaddr) >> PAGE_SHIFT; + + return pages + offs; +} + static bool __in_atomic_pool(void *start, size_t size) { struct dma_pool *pool = &atomic_pool; @@ -1288,6 +1297,9 @@ static struct page **__iommu_get_pages(void *cpu_addr, struct dma_attrs *attrs) { struct vm_struct *area; + if (__in_atomic_pool(cpu_addr, PAGE_SIZE)) + return __atomic_get_pages(cpu_addr); + if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) return cpu_addr;