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[91.189.95.16]) by mx.google.com with ESMTP id fj2si11421049wib.47.2012.08.22.07.45.03; Wed, 22 Aug 2012 07:45:12 -0700 (PDT) Received-SPF: neutral (google.com: 91.189.95.16 is neither permitted nor denied by best guess record for domain of linaro-mm-sig-bounces@lists.linaro.org) client-ip=91.189.95.16; Authentication-Results: mx.google.com; spf=neutral (google.com: 91.189.95.16 is neither permitted nor denied by best guess record for domain of linaro-mm-sig-bounces@lists.linaro.org) smtp.mail=linaro-mm-sig-bounces@lists.linaro.org Received: from localhost ([127.0.0.1] helo=mombin.canonical.com) by mombin.canonical.com with esmtp (Exim 4.71) (envelope-from ) id 1T4CB1-0001c5-TS; Wed, 22 Aug 2012 14:44:59 +0000 Received: from hqemgate04.nvidia.com ([216.228.121.35]) by mombin.canonical.com with esmtp (Exim 4.71) (envelope-from ) id 1T4CB0-0001bQ-N8 for linaro-mm-sig@lists.linaro.org; Wed, 22 Aug 2012 14:44:59 +0000 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate04.nvidia.com id ; Wed, 22 Aug 2012 07:43:58 -0700 Received: from hqemhub02.nvidia.com ([172.17.108.22]) by hqnvupgp07.nvidia.com (PGP Universal service); Wed, 22 Aug 2012 07:38:45 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Wed, 22 Aug 2012 07:38:45 -0700 Received: from deemhub02.nvidia.com (10.21.69.138) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server (TLS) id 8.3.264.0; Wed, 22 Aug 2012 07:44:36 -0700 Received: from DEMAIL01.nvidia.com ([10.21.69.140]) by deemhub02.nvidia.com ([10.21.69.138]) with mapi; Wed, 22 Aug 2012 16:44:32 +0200 From: Hiroshi Doyu To: "m.szyprowski@samsung.com" Date: Wed, 22 Aug 2012 16:44:29 +0200 Thread-Topic: [RFC 0/4] ARM: dma-mapping: IOMMU atomic allocation Thread-Index: Ac2AdKQhZr6VE7kCRyelmQ2sRg33Kg== Message-ID: <20120822.174429.909991514856769456.hdoyu@nvidia.com> References: <1345630830-9586-1-git-send-email-hdoyu@nvidia.com><005901cd805e$4afd2e40$e0f78ac0$%szyprowski@samsung.com> In-Reply-To: <005901cd805e$4afd2e40$e0f78ac0$%szyprowski@samsung.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-nvconfidentiality: public acceptlanguage: en-US MIME-Version: 1.0 Cc: "linux@arm.linux.org.uk" , "arnd@arndb.de" , "konrad.wilk@oracle.com" , "minchan@kernel.org" , "linux-kernel@vger.kernel.org" , "linaro-mm-sig@lists.linaro.org" , "linux-mm@kvack.org" , "kyungmin.park@samsung.com" , "linux-arm-kernel@lists.infradead.org" Subject: Re: [Linaro-mm-sig] [RFC 0/4] ARM: dma-mapping: IOMMU atomic allocation X-BeenThere: linaro-mm-sig@lists.linaro.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: "Unified memory management interest group." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linaro-mm-sig-bounces@lists.linaro.org Errors-To: linaro-mm-sig-bounces@lists.linaro.org X-Gm-Message-State: ALoCoQnza5i44HF/hV6bL2+VVqZvrul9RUb/mnDxA6PlMhqkzSxR/U4srO8SqyCZcRSdNcJ0OklY Hi Marek, Marek Szyprowski wrote @ Wed, 22 Aug 2012 14:04:26 +0200: > Hi Hiroshi, > > On Wednesday, August 22, 2012 12:20 PM Hiroshi Doyu wrote: > > > The commit e9da6e9 "ARM: dma-mapping: remove custom consistent dma > > region" breaks the compatibility with existing drivers. This causes > > the following kernel oops(*1). That driver has called dma_pool_alloc() > > to allocate memory from the interrupt context, and it hits > > BUG_ON(in_interrpt()) in "get_vm_area_caller()". This patch seris > > fixes this problem with making use of the pre-allocate atomic memory > > pool which DMA is using in the same way as DMA does now. > > > > Any comment would be really appreciated. > > I was working on the similar patches, but You were faster. ;-) Thank you for reviewing my patches. > Basically the patch no 1 and 2 are fine, but I don't like the changes proposed in > patch 3 and 4. You should not alter the attributes provided by the user nor make any > assumptions that such attributes has been provided - drivers are allowed to call > dma_alloc_attrs() directly. Please rework your patches to avoid such > approach. Sure. I'll send the series again later. Instead of making use of DMA_ATTR_NO_KERNEL_MAPPING, I use the following "__in_atomic_pool()" to see if buffer comes from atomic or not at freeing. >From cdf8621fd0876f3e56a55885c27e363893df2c98 Mon Sep 17 00:00:00 2001 From: Hiroshi Doyu Date: Wed, 22 Aug 2012 17:26:29 +0300 Subject: [PATCH 1/1] ARM: dma-mapping: Refactor out to introduce __in_atomic_pool Check the given range("start", "size") is included in "atomic_pool" or not. Signed-off-by: Hiroshi Doyu --- arch/arm/mm/dma-mapping.c | 20 +++++++++++++++----- 1 files changed, 15 insertions(+), 5 deletions(-) diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index 30bef80..26080ef 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -450,20 +450,30 @@ static void *__alloc_from_pool(size_t size, struct page **ret_page) return ptr; } -static int __free_from_pool(void *start, size_t size) +static bool __in_atomic_pool(void *start, size_t size) { struct dma_pool *pool = &atomic_pool; - unsigned long pageno, count; - unsigned long flags; if (start < pool->vaddr || start > pool->vaddr + pool->size) - return 0; + return false; if (start + size > pool->vaddr + pool->size) { WARN(1, "freeing wrong coherent size from pool\n"); - return 0; + return false; } + return true; +} + +static int __free_from_pool(void *start, size_t size) +{ + struct dma_pool *pool = &atomic_pool; + unsigned long pageno, count; + unsigned long flags; + + if (!__in_atomic_pool(start, size)) + return 0; + pageno = (start - pool->vaddr) >> PAGE_SHIFT; count = size >> PAGE_SHIFT;