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a=rsa-sha256; c=relaxed/relaxed; d=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=u1Pu0s1hF9y6aH7eoYL3YowXV+FxIrmdTjf9m46027g=; b=QSEyIpcqyGsdz0ZVT26X/L22U416tI69gUL2PfFMyOxt7jy8cES7T1pJvlhLOnOX43mWjT2yFGdKHQfbUn72v4adAUJZH097Cy/s5FjGCcMw6IaK4gHTxcpD8PDnIZCnXo7gZ4e4eJXU87bh0a5d5HGzUsVa/1sGpNQLIYZu6GU= Authentication-Results: arm.com; dkim=none (message not signed) header.d=none; arm.com; dmarc=none action=none header.from=cavium.com; Received: from rric.localdomain (92.229.135.253) by CY1PR07MB2348.namprd07.prod.outlook.com (10.166.194.147) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1178.14; Fri, 23 Jun 2017 04:59:46 +0000 Date: Fri, 23 Jun 2017 06:59:33 +0200 From: Robert Richter To: Lorenzo Pieralisi Cc: Will Deacon , Geetha sowjanya , linux-arm-kernel@lists.infradead.org, robh@kernel.org, devel@acpica.org, catalin.marinas@arm.com, Charles.Garcia-Tobin@arm.com, geethasowjanya.akula@gmail.com, jcm@redhat.com, linu.cherian@cavium.com, rjw@rjwysocki.net, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org, sgoutham@cavium.com, robin.murphy@arm.com Subject: [PATCH] iommu/arm-smmu-v3, acpi: Add temporary Cavium SMMU-V3 IORT model number definitions Message-ID: <20170623045933.GR16981@rric.localdomain> References: <1498133138-20244-1-git-send-email-gakula@caviumnetworks.com> <20170622182257.GI15336@arm.com> <20170622185822.GK15336@arm.com> <20170622193535.GA10237@rric.localdomain> <20170622210437.GA27861@red-moon> <20170623045541.GQ16981@rric.localdomain> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20170623045541.GQ16981@rric.localdomain> User-Agent: Mutt/1.5.23 (2014-03-12) X-Originating-IP: [92.229.135.253] X-ClientProxiedBy: HE1PR0501CA0028.eurprd05.prod.outlook.com (10.168.27.166) To CY1PR07MB2348.namprd07.prod.outlook.com (10.166.194.147) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 8c1253ea-0d29-4102-f854-08d4b9f4ae22 X-Microsoft-Antispam: UriScan:; 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Errata ID #74 > > > > > > SMMU register alias Page 1 is not implemented > > > > > > 2. Errata ID #126 > > > > > > SMMU doesnt support unique IRQ lines and also MSI for gerror, > > > > > > eventq and cmdq-sync > > > > > > > > > > > > The following patchset does software workaround for these two erratas. > > > > > > > > > > I've picked up the first two patches, and left comments on the final patch. > > > > > > > > ... except that it doesn't build: > > > > > > > > > > > > drivers/acpi/arm64/iort.c: In function ‘arm_smmu_v3_resource_size’: > > > > drivers/acpi/arm64/iort.c:837:21: error: ‘ACPI_IORT_SMMU_V3_CAVIUM_CN99XX’ undeclared (first use in this function) > > > > if (smmu->model == ACPI_IORT_SMMU_V3_CAVIUM_CN99XX) > > > > ^ > > > > drivers/acpi/arm64/iort.c:837:21: note: each undeclared identifier is reported only once for each function it appears in > > > > make[4]: *** [drivers/acpi/arm64/iort.o] Error 1 > > > > > > > > > > > > I don't see ACPI_IORT_SMMU_V3_CAVIUM_CN99XX defined, even in linux-next. > > > > > > > > What's the plan here? > > > > > > It is defined already in acpica and we actually waiting for the acpi > > > maintainers to include it: > > > > > > https://github.com/acpica/acpica/commit/d00a4eb86e64 > > > > > > We could add > > > > > > /* Until ACPICA headers cover IORT rev. C */ > > > #ifndef ACPI_IORT_SMMU_V3_CAVIUM_CN99XX > > > #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x2 > > > #endif > > > > > > to both files: > > > > > > drivers/acpi/arm64/iort.c > > > drivers/iommu/arm-smmu-v3.c > > > > > > > I thought it was a solved problem (and that the IORT patch was based > > on Robin's workaround) but I was clearly wrong and I apologise to > > Will about this. > > > > FWIW, you could add the define in include/linux/acpi_iort.h and I will > > remove it whenever ACPICA changes make it into the kernel. > > Adding it there will still let depend us on acpi maintainers, while I > think the over 2 files might go through arm64 tree smoothly. A change > in acpi_iort.h also adds the definition to other archs and I don't > think that adding arch #ifdefs to avoid that are welcome in that > header file too. > > I am going to resend my patch below with an improved wording. Here it comes: >From d210b4c540bc4adcebd51d5a87437d2049649e94 Mon Sep 17 00:00:00 2001 From: Robert Richter Date: Thu, 22 Jun 2017 21:20:54 +0200 Subject: [PATCH] iommu/arm-smmu-v3, acpi: Add temporary Cavium SMMU-V3 IORT model number definitions The model number is already defined in acpica and we are actually waiting for the acpi maintainers to include it: https://github.com/acpica/acpica/commit/d00a4eb86e64 Adding those temporary definitions until the change makes it into include/acpi/actbl2.h. Once that is done this patch can be reverted. Signed-off-by: Robert Richter --- drivers/acpi/arm64/iort.c | 5 +++++ drivers/iommu/arm-smmu-v3.c | 5 +++++ 2 files changed, 10 insertions(+) -- 2.11.0 -- To unsubscribe from this list: send the line "unsubscribe linux-acpi" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Lorenzo Pieralisi diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c index 797b28dc7b34..15491237a657 100644 --- a/drivers/acpi/arm64/iort.c +++ b/drivers/acpi/arm64/iort.c @@ -31,6 +31,11 @@ #define IORT_IOMMU_TYPE ((1 << ACPI_IORT_NODE_SMMU) | \ (1 << ACPI_IORT_NODE_SMMU_V3)) +/* Until ACPICA headers cover IORT rev. C */ +#ifndef ACPI_IORT_SMMU_V3_CAVIUM_CN99XX +#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x2 +#endif + struct iort_its_msi_chip { struct list_head list; struct fwnode_handle *fw_node; diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 380969aa60d5..c759dfa7442d 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -412,6 +412,11 @@ #define MSI_IOVA_BASE 0x8000000 #define MSI_IOVA_LENGTH 0x100000 +/* Until ACPICA headers cover IORT rev. C */ +#ifndef ACPI_IORT_SMMU_V3_CAVIUM_CN99XX +#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x2 +#endif + static bool disable_bypass; module_param_named(disable_bypass, disable_bypass, bool, S_IRUGO); MODULE_PARM_DESC(disable_bypass,