From patchwork Mon May 24 11:02:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 446439 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp3238544jac; Mon, 24 May 2021 04:04:23 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxq1zxg6rxYrKptBWTbSXC0nwZPdEXHAmZlRhgpG+EX6nBdTYYri+BjVcGL/Fd7/JJ69Cfp X-Received: by 2002:a05:6638:155:: with SMTP id y21mr25544734jao.62.1621854263275; Mon, 24 May 2021 04:04:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621854263; cv=none; d=google.com; s=arc-20160816; b=X+IcoeD6kFCxh6Mwdqsn920xvW+LEElcR8VPcN3t9L4CtBIs/x85I4E0c4r99WaFNB 92KAu1vLiz1xlz5166Gc2JqfduoIjRsKAN2LJNcVSOo5V3KAuCZnI3RUOb8f9EwAA5t1 HePjANGt3vCheRXD/h4rzoXDHbO49EZoXcBYD32m26odWp7hLSU36/MAF03dpf2d4Syx fBm5+VZry3PZ170JzbQt+3MhM4gL9i6g+Ib5dDy/MeaqhFcJ6V5ftFH/By2OAcHb5sCY HG3q9mP6UiviBbYc3ZY2y97sJpmFn1Xl1yuHzlnkDXhz761v76QSiA9gpBC1C+rYYGRz RlKA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=o1xF5+mQQR1ucyOgRqgImJ8CDEvHvaUpPOKiI9z+NN4=; b=pt2XcR7IPZoQk3Ro9fVCOHzCNN5xdH9CCOYNrMgTSRCR9Oe8A9gPI7e+aYu+F/DPNv /ON1iAfThxFUBxCLuZPneoaQN0CEVGJ1owMvujftx0lN8yMW49C2dQOSVV1GYpB+cPWE D/5+GrBWoC6QTWk+V5nys0cCPBGzRgpQD60qNlKsx4jJz2XyFrQ33bs6NrEPJTLaiDA8 USpsxX4N23f+XKdtTzDKy/5nFkC0XvT1y0KEcOa1jUn1uhn79cRSQEoOfz2wKunhOIkW sgUy04jbM8zeSpe0fnIPdnkj0GOjI/EXBoyFptOX4w2n2vh3h0UuBgVjK92QI/rM7Vnl bThA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id f14si12766626ilj.120.2021.05.24.04.04.23; Mon, 24 May 2021 04:04:23 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232589AbhEXLFt (ORCPT + 4 others); Mon, 24 May 2021 07:05:49 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:3976 "EHLO szxga06-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232494AbhEXLFt (ORCPT ); Mon, 24 May 2021 07:05:49 -0400 Received: from dggems705-chm.china.huawei.com (unknown [172.30.72.58]) by szxga06-in.huawei.com (SkyGuard) with ESMTP id 4FpZ6H2Ft2zmZw3; Mon, 24 May 2021 19:01:59 +0800 (CST) Received: from lhreml710-chm.china.huawei.com (10.201.108.61) by dggems705-chm.china.huawei.com (10.3.19.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 24 May 2021 19:04:18 +0800 Received: from A2006125610.china.huawei.com (10.47.80.77) by lhreml710-chm.china.huawei.com (10.201.108.61) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 24 May 2021 12:04:08 +0100 From: Shameer Kolothum To: , , CC: , , , , , , , , , , Subject: [PATCH v5 7/8] iommu/arm-smmu: Get associated RMR info and install bypass SMR Date: Mon, 24 May 2021 12:02:21 +0100 Message-ID: <20210524110222.2212-8-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20210524110222.2212-1-shameerali.kolothum.thodi@huawei.com> References: <20210524110222.2212-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.80.77] X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To lhreml710-chm.china.huawei.com (10.201.108.61) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org From: Jon Nettleton Check if there is any RMR info associated with the devices behind the SMMU and if any, install bypass SMRs for them. This is to keep any ongoing traffic associated with these devices alive when we enable/reset SMMU during probe(). Signed-off-by: Jon Nettleton Signed-off-by: Steven Price Signed-off-by: Shameer Kolothum --- drivers/iommu/arm/arm-smmu/arm-smmu.c | 65 +++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) -- 2.17.1 diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c index 6f72c4d208ca..56db3d3238fc 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -2042,6 +2042,67 @@ err_reset_platform_ops: __maybe_unused; return err; } +static void arm_smmu_rmr_install_bypass_smr(struct arm_smmu_device *smmu) +{ + struct list_head rmr_list; + struct iommu_resv_region *e; + int i, cnt = 0; + u32 smr; + u32 reg; + + INIT_LIST_HEAD(&rmr_list); + if (iommu_dma_get_rmrs(dev_fwnode(smmu->dev), &rmr_list)) + return; + + reg = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sCR0); + + if ((reg & ARM_SMMU_sCR0_USFCFG) && !(reg & ARM_SMMU_sCR0_CLIENTPD)) { + /* + * SMMU is already enabled and disallowing bypass, so preserve + * the existing SMRs + */ + for (i = 0; i < smmu->num_mapping_groups; i++) { + smr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_SMR(i)); + if (!FIELD_GET(ARM_SMMU_SMR_VALID, smr)) + continue; + smmu->smrs[i].id = FIELD_GET(ARM_SMMU_SMR_ID, smr); + smmu->smrs[i].mask = FIELD_GET(ARM_SMMU_SMR_MASK, smr); + smmu->smrs[i].valid = true; + } + } + + list_for_each_entry(e, &rmr_list, list) { + u32 sid = e->fw_data.rmr.sid; + + i = arm_smmu_find_sme(smmu, sid, ~0); + if (i < 0) + continue; + if (smmu->s2crs[i].count == 0) { + smmu->smrs[i].id = sid; + smmu->smrs[i].mask = ~0; + smmu->smrs[i].valid = true; + } + smmu->s2crs[i].count++; + smmu->s2crs[i].type = S2CR_TYPE_BYPASS; + smmu->s2crs[i].privcfg = S2CR_PRIVCFG_DEFAULT; + smmu->s2crs[i].cbndx = 0xff; + + cnt++; + } + + if ((reg & ARM_SMMU_sCR0_USFCFG) && !(reg & ARM_SMMU_sCR0_CLIENTPD)) { + /* Remove the valid bit for unused SMRs */ + for (i = 0; i < smmu->num_mapping_groups; i++) { + if (smmu->s2crs[i].count == 0) + smmu->smrs[i].valid = false; + } + } + + dev_notice(smmu->dev, "\tpreserved %d boot mapping%s\n", cnt, + cnt == 1 ? "" : "s"); + iommu_dma_put_rmrs(dev_fwnode(smmu->dev), &rmr_list); +} + static int arm_smmu_device_probe(struct platform_device *pdev) { struct resource *res; @@ -2168,6 +2229,10 @@ static int arm_smmu_device_probe(struct platform_device *pdev) } platform_set_drvdata(pdev, smmu); + + /* Check for RMRs and install bypass SMRs if any */ + arm_smmu_rmr_install_bypass_smr(smmu); + arm_smmu_device_reset(smmu); arm_smmu_test_smr_masks(smmu);