From patchwork Wed Sep 7 08:30:51 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 3954 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 5007023EF9 for ; Wed, 7 Sep 2011 08:33:15 +0000 (UTC) Received: from mail-fx0-f52.google.com (mail-fx0-f52.google.com [209.85.161.52]) by fiordland.canonical.com (Postfix) with ESMTP id 4512CA186BD for ; Wed, 7 Sep 2011 08:33:15 +0000 (UTC) Received: by mail-fx0-f52.google.com with SMTP id 18so492904fxd.11 for ; Wed, 07 Sep 2011 01:33:15 -0700 (PDT) Received: by 10.223.4.133 with SMTP id 5mr3244665far.81.1315384395179; Wed, 07 Sep 2011 01:33:15 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.11.8 with SMTP id m8cs130968lab; Wed, 7 Sep 2011 01:33:15 -0700 (PDT) Received: by 10.213.7.143 with SMTP id d15mr988376ebd.137.1315384394373; Wed, 07 Sep 2011 01:33:14 -0700 (PDT) Received: from eu1sys200aog102.obsmtp.com (eu1sys200aog102.obsmtp.com [207.126.144.113]) by mx.google.com with SMTP id e60si2615756eec.70.2011.09.07.01.32.41 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 07 Sep 2011 01:33:14 -0700 (PDT) Received-SPF: neutral (google.com: 207.126.144.113 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.113; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.113 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob102.postini.com ([207.126.147.11]) with SMTP ID DSNKTmcrweMU4XvrJSmNdHRIjf27tZ14ZuxO@postini.com; Wed, 07 Sep 2011 08:33:14 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 3B9172BD; Wed, 7 Sep 2011 08:30:56 +0000 (GMT) Received: from relay2.stm.gmessaging.net (unknown [10.230.100.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id D8B4A1489; Wed, 7 Sep 2011 08:30:55 +0000 (GMT) Received: from exdcvycastm004.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm004", Issuer "exdcvycastm004" (not verified)) by relay2.stm.gmessaging.net (Postfix) with ESMTPS id D5868A807E; Wed, 7 Sep 2011 10:30:51 +0200 (CEST) Received: from localhost.localdomain (10.230.100.153) by smtp.stericsson.com (10.230.100.2) with Microsoft SMTP Server (TLS) id 8.3.83.0; Wed, 7 Sep 2011 10:30:55 +0200 From: Linus Walleij To: Cc: Lee Jones , Linus Walleij , Russell King , Thomas Gleixner Subject: [PATCH 2/4] mach-integrator: clockevent supports oneshot mode Date: Wed, 7 Sep 2011 10:30:51 +0200 Message-ID: <1315384251-27369-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.3.2 MIME-Version: 1.0 From: Linus Walleij The Integrator AP timer has no problem supporting oneshot ticks with proper code, so let's do it so we can have NOHZ configured in for this platform too. Cc: Russell King Cc: Thomas Gleixner Signed-off-by: Linus Walleij --- arch/arm/mach-integrator/integrator_ap.c | 20 ++++++++++++++------ 1 files changed, 14 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index 7748be1..8516193 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c @@ -362,12 +362,20 @@ static void clkevt_set_mode(enum clock_event_mode mode, struct clock_event_devic { u32 ctrl = readl(clkevt_base + TIMER_CTRL) & ~TIMER_CTRL_ENABLE; - BUG_ON(mode == CLOCK_EVT_MODE_ONESHOT); - - if (mode == CLOCK_EVT_MODE_PERIODIC) { - writel(ctrl, clkevt_base + TIMER_CTRL); - writel(timer_reload, clkevt_base + TIMER_LOAD); + switch (mode) { + case CLOCK_EVT_MODE_PERIODIC: ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE; + break; + case CLOCK_EVT_MODE_ONESHOT: + ctrl &= ~TIMER_CTRL_PERIODIC; + ctrl |= TIMER_CTRL_ENABLE; + break; + case CLOCK_EVT_MODE_UNUSED: + case CLOCK_EVT_MODE_SHUTDOWN: + case CLOCK_EVT_MODE_RESUME: + default: + /* Just leave in disabled state */ + break; } writel(ctrl, clkevt_base + TIMER_CTRL); @@ -387,7 +395,7 @@ static int clkevt_set_next_event(unsigned long next, struct clock_event_device * static struct clock_event_device integrator_clockevent = { .name = "timer1", .shift = 34, - .features = CLOCK_EVT_FEAT_PERIODIC, + .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, .set_mode = clkevt_set_mode, .set_next_event = clkevt_set_next_event, .rating = 300,