From patchwork Mon Dec 12 09:57:10 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 5590 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id BFDE423E18 for ; Mon, 12 Dec 2011 09:58:05 +0000 (UTC) Received: from mail-bw0-f52.google.com (mail-bw0-f52.google.com [209.85.214.52]) by fiordland.canonical.com (Postfix) with ESMTP id ABF9FA18625 for ; Mon, 12 Dec 2011 09:58:05 +0000 (UTC) Received: by mail-bw0-f52.google.com with SMTP id 17so6970166bke.11 for ; Mon, 12 Dec 2011 01:58:05 -0800 (PST) Received: by 10.204.157.12 with SMTP id z12mr6587033bkw.18.1323683885488; Mon, 12 Dec 2011 01:58:05 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.205.129.2 with SMTP id hg2cs42863bkc; Mon, 12 Dec 2011 01:58:05 -0800 (PST) Received: by 10.14.10.220 with SMTP id 68mr2478387eev.225.1323683884087; Mon, 12 Dec 2011 01:58:04 -0800 (PST) Received: from eu1sys200aog118.obsmtp.com (eu1sys200aog118.obsmtp.com. [207.126.144.145]) by mx.google.com with SMTP id 57si5260752eee.206.2011.12.12.01.57.57 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 12 Dec 2011 01:58:04 -0800 (PST) Received-SPF: neutral (google.com: 207.126.144.145 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.145; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.145 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-us.st.com ([167.4.1.35]) (using TLSv1) by eu1sys200aob118.postini.com ([207.126.147.11]) with SMTP ID DSNKTuXQIEJZ/mLjTGot3/wVAMspebZcDO/x@postini.com; Mon, 12 Dec 2011 09:58:03 UTC Received: from zeta.dmz-us.st.com (ns4.st.com [167.4.16.71]) by beta.dmz-us.st.com (STMicroelectronics) with ESMTP id 06F7C78; Mon, 12 Dec 2011 09:57:18 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-us.st.com (STMicroelectronics) with ESMTP id 10AD762; Mon, 12 Dec 2011 09:31:03 +0000 (GMT) Received: from exdcvycastm004.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm004", Issuer "exdcvycastm004" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id A2BD524C2FB; Mon, 12 Dec 2011 10:57:15 +0100 (CET) Received: from localhost.localdomain (10.230.100.153) by smtp.stericsson.com (10.230.100.2) with Microsoft SMTP Server (TLS) id 8.3.83.0; Mon, 12 Dec 2011 10:57:20 +0100 From: Linus Walleij To: Russell King , Cc: Colin Cross , Thomas Gleixner , Rob Herring , Santosh Shilimkar , Linus Walleij , Russell King Subject: [PATCH 2/4] ARM: smp_twd: create a percpu reference to the clockevent Date: Mon, 12 Dec 2011 10:57:10 +0100 Message-ID: <1323683830-23867-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.3.2 MIME-Version: 1.0 From: Linus Walleij This break-out from Colin Cross' cpufreq-aware TWD patch will create a local percpu reference to the clock event, so we can reference the event when the frequency of the TWD clock input changes at runtime. Signed-off-by: Colin Cross Cc: Russell King Acked-by: Thomas Gleixner Acked-by: Rob Herring Acked-by: Santosh Shilimkar [Broke out of larger SMP TWD patch] Signed-off-by: Linus Walleij --- arch/arm/kernel/smp_twd.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index f057561..20cce4e 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -26,6 +27,7 @@ void __iomem *twd_base; static unsigned long twd_timer_rate; +static DEFINE_PER_CPU(struct clock_event_device *, twd_ce); static struct clock_event_device __percpu **twd_evt; @@ -177,6 +179,8 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk) this_cpu_clk = __this_cpu_ptr(twd_evt); *this_cpu_clk = clk; + __get_cpu_var(twd_ce) = clk; + clockevents_config_and_register(clk, twd_timer_rate, 0xf, 0xffffffff); enable_percpu_irq(clk->irq, 0);