From patchwork Tue Feb 14 10:47:36 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Philippe Langlais X-Patchwork-Id: 6772 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id C598E23E01 for ; Tue, 14 Feb 2012 10:48:25 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id 71AA0A18839 for ; Tue, 14 Feb 2012 10:48:25 +0000 (UTC) Received: by iabz7 with SMTP id z7so7476319iab.11 for ; Tue, 14 Feb 2012 02:48:24 -0800 (PST) Received: by 10.42.80.3 with SMTP id t3mr26807817ick.49.1329216504871; Tue, 14 Feb 2012 02:48:24 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.66.135 with SMTP id n7cs85608ibi; Tue, 14 Feb 2012 02:48:23 -0800 (PST) Received: by 10.14.133.76 with SMTP id p52mr4998533eei.103.1329216502894; Tue, 14 Feb 2012 02:48:22 -0800 (PST) Received: from eu1sys200aog112.obsmtp.com (eu1sys200aog112.obsmtp.com. [207.126.144.133]) by mx.google.com with SMTP id m49si11198086eef.100.2012.02.14.02.48.17 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 14 Feb 2012 02:48:22 -0800 (PST) Received-SPF: neutral (google.com: 207.126.144.133 is neither permitted nor denied by best guess record for domain of philippe.langlais@stericsson.com) client-ip=207.126.144.133; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.133 is neither permitted nor denied by best guess record for domain of philippe.langlais@stericsson.com) smtp.mail=philippe.langlais@stericsson.com Received: from beta.dmz-us.st.com ([167.4.1.35]) (using TLSv1) by eu1sys200aob112.postini.com ([207.126.147.11]) with SMTP ID DSNKTzo78TUXMcP9oCv+fi0DTo39n6PTVW9Z@postini.com; Tue, 14 Feb 2012 10:48:22 UTC Received: from zeta.dmz-us.st.com (ns4.st.com [167.4.16.71]) by beta.dmz-us.st.com (STMicroelectronics) with ESMTP id 7210F64; Tue, 14 Feb 2012 10:48:05 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-us.st.com (STMicroelectronics) with ESMTP id 58E645C; Tue, 14 Feb 2012 09:32:19 +0000 (GMT) Received: from exdcvycastm003.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm003", Issuer "exdcvycastm003" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id 332FC24C075; Tue, 14 Feb 2012 11:48:09 +0100 (CET) Received: from localhost.localdomain (10.230.100.153) by smtp.stericsson.com (10.230.100.1) with Microsoft SMTP Server (TLS) id 8.3.83.0; Tue, 14 Feb 2012 11:48:14 +0100 From: Philippe Langlais To: , Cc: , , Philippe Langlais , =?UTF-8?q?Benn=20P=C3=B6rscke?= Subject: [PATCH] ux500: Remove keyboard pin definition for snowball Date: Tue, 14 Feb 2012 11:47:36 +0100 Message-ID: <1329216456-5569-1-git-send-email-philippe.langlais@stericsson.com> X-Mailer: git-send-email 1.7.6 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQkefelXJ0YMV3EE4vxZD12z6szFkWo6OCsMBI4eoTBQyqEByO2omdwUxQ3Ah5NmPuycWXNE From: Philippe Langlais Interfered with CG2900 Signed-off-by: Benn Pörscke Signed-off-by: Philippe Langlais --- arch/arm/mach-ux500/board-mop500-pins.c | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c index f8e7cd7..da17111 100644 --- a/arch/arm/mach-ux500/board-mop500-pins.c +++ b/arch/arm/mach-ux500/board-mop500-pins.c @@ -419,7 +419,6 @@ static struct ux500_pin_lookup mop500_pins[] = { PIN_LOOKUP("nmk-i2c.1", &mop500_pins_i2c1), PIN_LOOKUP("nmk-i2c.2", &mop500_pins_i2c2), PIN_LOOKUP("nmk-i2c.3", &mop500_pins_i2c3), - PIN_LOOKUP("ske", &mop500_pins_ske), PIN_LOOKUP("sdi0", &mop500_pins_sdi0), PIN_LOOKUP("sdi1", &mop500_pins_sdi1), PIN_LOOKUP("sdi2", &mop500_pins_sdi2), @@ -428,6 +427,10 @@ static struct ux500_pin_lookup mop500_pins[] = { PIN_LOOKUP("spi2", &mop500_pins_spi2), }; +static struct ux500_pin_lookup mop500_ske_pins[] = { + PIN_LOOKUP("ske", &mop500_pins_ske), +}; + /* * Sleep pin configuration for u8500 platform. * If another HW is used the GPIO's must be configured @@ -930,6 +933,7 @@ void __init mop500_pins_init(void) ARRAY_SIZE(mop500_pins_common)); ux500_pins_add(mop500_pins, ARRAY_SIZE(mop500_pins)); + ux500_pins_add(mop500_ske_pins, ARRAY_SIZE(mop500_ske_pins)); switch (pinsfor) { case PINS_FOR_U9500: @@ -971,6 +975,7 @@ void __init hrefv60_pins_init(void) ARRAY_SIZE(mop500_pins_common)); ux500_pins_add(mop500_pins, ARRAY_SIZE(mop500_pins)); + ux500_pins_add(mop500_ske_pins, ARRAY_SIZE(mop500_ske_pins)); nmk_config_pins(hrefv60_pins, ARRAY_SIZE(hrefv60_pins));