From patchwork Tue Apr 17 10:44:08 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 7903 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 2C25423E00 for ; Tue, 17 Apr 2012 10:45:29 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id C3768A181C2 for ; Tue, 17 Apr 2012 10:45:28 +0000 (UTC) Received: by mail-iy0-f180.google.com with SMTP id e36so12004590iag.11 for ; Tue, 17 Apr 2012 03:45:28 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=ZYk4q+hE+huGn885aFpeV5gg1VhAElFPd/odWYKz4UU=; b=Tn/UKg3fLdPD9PrCapNyUD0fMRYScNIEmo3E8I6lhQFTeI7E5SmF7sSdJjd2lHkHU2 iJZNHZx4nVuOV3dOImaEZ5+tWFKstBrB1wRb7Xcoxwh24PUNeeyr6W7Lu4dJcHVJRa2f qe0iK7CVjG0V00GkgA0Q2ZnJB1Z0xo3pNTzmU9Z/0mned5IU9dXTf0yErbgBbH+Ob5xS amOKcDRWc6JgAdOuqaHddi5QGdQJip+oQ933GN9dDjaEIwgdwrxXnEJ5Z3RvocA86vNT t3TpT+aDn0H3LskAWzFt4QwK5JPKAGbMcWrPiGu4YBLWCISoSV9DThNBWWE1+xXHgpsW VHEA== Received: by 10.43.52.74 with SMTP id vl10mr9511918icb.55.1334659528574; Tue, 17 Apr 2012 03:45:28 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.137.198 with SMTP id x6csp138736ibt; Tue, 17 Apr 2012 03:45:28 -0700 (PDT) Received: by 10.216.131.30 with SMTP id l30mr8896658wei.111.1334659527535; Tue, 17 Apr 2012 03:45:27 -0700 (PDT) Received: from mail-wg0-f50.google.com (mail-wg0-f50.google.com [74.125.82.50]) by mx.google.com with ESMTPS id bl2si11620333wib.27.2012.04.17.03.45.27 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 17 Apr 2012 03:45:27 -0700 (PDT) Received-SPF: neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) client-ip=74.125.82.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) smtp.mail=lee.jones@linaro.org Received: by mail-wg0-f50.google.com with SMTP id ds12so6054977wgb.31 for ; Tue, 17 Apr 2012 03:45:27 -0700 (PDT) Received: by 10.180.87.106 with SMTP id w10mr21465402wiz.2.1334659527080; Tue, 17 Apr 2012 03:45:27 -0700 (PDT) Received: from localhost.localdomain (cpc1-aztw13-0-0-cust473.18-1.cable.virginmedia.com. [77.102.241.218]) by mx.google.com with ESMTPS id fn2sm42069492wib.0.2012.04.17.03.45.23 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 17 Apr 2012 03:45:26 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org Cc: arnd@arndb.de, linus.walleij@stericsson.com, grant.likely@secretlab.ca, cjb@laptop.org, linux@arm.linux.org.uk, Lee Jones Subject: [PATCH 16/16] ARM: ux500: Enable PRCMU Timer 4 (clocksource) via Device Tree Date: Tue, 17 Apr 2012 11:44:08 +0100 Message-Id: <1334659448-11521-17-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.7.9.1 In-Reply-To: <1334659448-11521-1-git-send-email-lee.jones@linaro.org> References: <1334659448-11521-1-git-send-email-lee.jones@linaro.org> X-Gm-Message-State: ALoCoQm4DMk1k30u6KcVLAlejssjgcHzhzehKEj2Nzf2UiQo3fhQpFPaqo4pEXxM6BkrqtBCg0eK In dbx500 based devices the PRCMU Timer 4 is used as a clocksource and sched_clock. Here we fetch all necessary addressing information required for correct PRCMU initialisation from the Device Tree instead of using hard-coded values. Signed-off-by: Lee Jones --- arch/arm/boot/dts/db8500.dtsi | 8 +++++++- arch/arm/mach-ux500/timer.c | 24 ++++++++++++++++++++++++ 2 files changed, 31 insertions(+), 1 deletions(-) diff --git a/arch/arm/boot/dts/db8500.dtsi b/arch/arm/boot/dts/db8500.dtsi index f633210..9a62f86 100644 --- a/arch/arm/boot/dts/db8500.dtsi +++ b/arch/arm/boot/dts/db8500.dtsi @@ -189,7 +189,13 @@ reg = <0x80157000 0x1000>; interrupts = <46 47>; #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; + ranges; + + prcmu-timer-4@80157450 { + compatible = "stericsson,db8500-prcmu-timer-4"; + reg = <0x80157450 0xC>; + }; ab8500@5 { compatible = "stericsson,ab8500"; diff --git a/arch/arm/mach-ux500/timer.c b/arch/arm/mach-ux500/timer.c index d37df98..885c742 100644 --- a/arch/arm/mach-ux500/timer.c +++ b/arch/arm/mach-ux500/timer.c @@ -8,6 +8,7 @@ #include #include #include +#include #include @@ -43,10 +44,17 @@ static void __init ux500_twd_init(void) #define ux500_twd_init() do { } while(0) #endif +const static struct of_device_id prcmu_timer_of_match[] __initconst = { + { .compatible = "stericsson,db8500-prcmu-timer-4", }, + { }, +}; + static void __init ux500_timer_init(void) { void __iomem *mtu_timer_base; void __iomem *prcmu_timer_base; + void __iomem *tmp_base; + struct device_node *np; if (cpu_is_u5500()) { mtu_timer_base = __io_address(U5500_MTU0_BASE); @@ -58,6 +66,22 @@ static void __init ux500_timer_init(void) ux500_unknown_soc(); } + /* TODO: Once MTU has been DT:ed place code above into else. */ + if (of_have_populated_dt()) { + np = of_find_matching_node(NULL, prcmu_timer_of_match); + if (!np) + goto dt_fail; + + tmp_base = of_iomap(np, 0); + if (!tmp_base) + goto dt_fail; + + prcmu_timer_base = tmp_base; + } + +dt_fail: + /* Doing it the old fashioned way. */ + /* * Here we register the timerblocks active in the system. * Localtimers (twd) is started when both cpu is up and running.