From patchwork Tue Sep 25 19:19:54 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 11722 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 8EC3823EB4 for ; Tue, 25 Sep 2012 19:20:20 +0000 (UTC) Received: from mail-ie0-f180.google.com (mail-ie0-f180.google.com [209.85.223.180]) by fiordland.canonical.com (Postfix) with ESMTP id 1B2B5A19140 for ; Tue, 25 Sep 2012 19:20:20 +0000 (UTC) Received: by ieje10 with SMTP id e10so13782338iej.11 for ; Tue, 25 Sep 2012 12:20:19 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:mime-version:content-type :x-gm-message-state; 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Tue, 25 Sep 2012 21:19:48 +0200 (CEST) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.1) with Microsoft SMTP Server (TLS) id 8.3.83.0; Tue, 25 Sep 2012 21:19:57 +0200 From: Linus Walleij To: Cc: Anmar Oueja , Linus Walleij , Arnd Bergmann , Rob Herring , Grant Likely Subject: [PATCH] ARM: GIC: dont warn on pre-allocated IRQ descs Date: Tue, 25 Sep 2012 21:19:54 +0200 Message-ID: <1348600794-2395-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.11.3 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQn0aqde0Nrd2F5Z/jxVtU4V82b4RyfincDUfyivYpH97neBywGZC+O1Nx0SnPuCWwmtCBGQ From: Linus Walleij Currently, if you try to turn on CONFIG_SPARSE_IRQS for a platform using the GIC, you will get this in your face: ------------[ cut here ]------------ WARNING: at /home/elinwal/linux-stericsson/arch/arm/common/gic.c:713 gic_init_bases+0xe8/0x290() Cannot allocate irq_descs @ IRQ16, assuming pre-allocated Modules linked in: [] (unwind_backtrace+0x0/0xf8) from [] (warn_slowpath_common+0x4c/0x64) [] (warn_slowpath_common+0x4c/0x64) from [] (warn_slowpath_fmt+0x30/0x40) [] (warn_slowpath_fmt+0x30/0x40) from [] (gic_init_bases+0xe8/0x290) [] (gic_init_bases+0xe8/0x290) from [] (ux500_init_irq+0xb0/0xfc) [] (ux500_init_irq+0xb0/0xfc) from [] (init_IRQ+0x14/0x1c) [] (init_IRQ+0x14/0x1c) from [] (start_kernel+0x198/0x2ec) [] (start_kernel+0x198/0x2ec) from [<00008044>] (0x8044) ---[ end trace 1b75b31a2719ed1c ]--- This is because the GIC tries to allocate fresh IRQ descs for its IRQs, and that would work with non-sparse IRQs but fails with sparse IRQs because the .nr_irqs from the platform always get pre-allocated at boot time. The allocation will succeed if the platform define .nr_irqs to 0 as an ideal device tree platform would do, but I think it is a bit thick to require that every platform that wants to use sparse IRQs must first or simultaneously switch to device tree. So make this to a simple pr_debug(). Cc: Arnd Bergmann Cc: Rob Herring Cc: Grant Likely Signed-off-by: Linus Walleij --- arch/arm/common/gic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index aa52699..fcda633 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -707,7 +707,7 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */ irq_base = irq_alloc_descs(irq_start, 16, gic_irqs, numa_node_id()); if (IS_ERR_VALUE(irq_base)) { - WARN(1, "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n", + pr_debug("Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n", irq_start); irq_base = irq_start; }