From patchwork Mon Feb 11 17:10:55 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 14748 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 936CA23DEA for ; Mon, 11 Feb 2013 17:11:59 +0000 (UTC) Received: from mail-vc0-f172.google.com (mail-vc0-f172.google.com [209.85.220.172]) by fiordland.canonical.com (Postfix) with ESMTP id 3399FA19245 for ; Mon, 11 Feb 2013 17:11:59 +0000 (UTC) Received: by mail-vc0-f172.google.com with SMTP id l6so4035240vcl.3 for ; Mon, 11 Feb 2013 09:11:58 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:x-received:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state; bh=zq3WthXpFAVRi4EgKaqUgTo2llzVHUqIMlf3PJC43CU=; b=Z233p6C5AYRhVBCGxRlkye0jKMXJ+97KFuFnqdqSUjUWh5BX4dx8P2wrW4GYjo8YgK zP+/insWMh71ZwEjFxRgLu1G47HLg9g6qXWwuBQyft747CIpCbtwV22QWBALER/+pJs6 FGc9VK0/XwiUNTSTNmF+l5bn2VxdniLd5diXiQwa/1uAC6z2nkqPQ6xiRHsRJcqt4D4Z TIPBgy56IQ6FbvOUq1fiUV0DjhDYpRDbUo3v2dSg7gZytB7aKwh2y3PWCdoxQ19nwpDi agIp1uwdbS0LUdfSxMyKWMtdqng6FVYMCMOLN5Hd0ftAEvrnTub5MzO7jx4eKoiwWaXk swdw== X-Received: by 10.52.24.98 with SMTP id t2mr17114670vdf.69.1360602718548; Mon, 11 Feb 2013 09:11:58 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.58.252.8 with SMTP id zo8csp108023vec; Mon, 11 Feb 2013 09:11:58 -0800 (PST) X-Received: by 10.50.217.167 with SMTP id oz7mr3267977igc.26.1360602717855; Mon, 11 Feb 2013 09:11:57 -0800 (PST) Received: from mail-pa0-f53.google.com (mail-pa0-f53.google.com [209.85.220.53]) by mx.google.com with ESMTPS id n6si50522795paw.341.2013.02.11.09.11.57 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 11 Feb 2013 09:11:57 -0800 (PST) Received-SPF: neutral (google.com: 209.85.220.53 is neither permitted nor denied by best guess record for domain of haojian.zhuang@linaro.org) client-ip=209.85.220.53; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.53 is neither permitted nor denied by best guess record for domain of haojian.zhuang@linaro.org) smtp.mail=haojian.zhuang@linaro.org Received: by mail-pa0-f53.google.com with SMTP id bg4so3112127pad.40 for ; Mon, 11 Feb 2013 09:11:57 -0800 (PST) X-Received: by 10.66.85.161 with SMTP id i1mr42280171paz.67.1360602717176; Mon, 11 Feb 2013 09:11:57 -0800 (PST) Received: from localhost.localdomain ([27.115.121.35]) by mx.google.com with ESMTPS id m3sm67935973pav.4.2013.02.11.09.11.51 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 11 Feb 2013 09:11:56 -0800 (PST) From: Haojian Zhuang To: shiraz.hashim@st.com, shiraz.linux.kernel@gmail.com, linux@arm.linux.org.uk, tony@atomide.com, linux-arm-kernel@lists.infradead.org, swarren@nvidia.com, grant.likely@secretlab.ca, linus.walleij@linaro.org Cc: patches@linaro.org, Haojian Zhuang Subject: [PATCH v8 08/12] pinctrl: single: set function mask as optional Date: Tue, 12 Feb 2013 01:10:55 +0800 Message-Id: <1360602659-4774-9-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1360602659-4774-1-git-send-email-haojian.zhuang@linaro.org> References: <1360602659-4774-1-git-send-email-haojian.zhuang@linaro.org> X-Gm-Message-State: ALoCoQmb+L1H2n/yysyWwCaOvQ3cwOd32H6jx1paQ92m/3dY020bNLjSayg/iy2eZF2w2t3toeDl Since Hisilicon's pin controller is divided into two parts. One is the function mux, and the other is pin configuration. These two parts are in the different memory regions. So make pinctrl-single,function-mask as optional property. Then we can define pingroups without valid function mux that is only used for pin configuration. Signed-off-by: Haojian Zhuang Acked-by: Tony Lindgren --- drivers/pinctrl/pinctrl-single.c | 26 ++++++++++++++++++++++---- 1 file changed, 22 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index 8b9dd95..fe8f321 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -350,6 +350,9 @@ static int pcs_enable(struct pinctrl_dev *pctldev, unsigned fselector, int i; pcs = pinctrl_dev_get_drvdata(pctldev); + /* If function mask is null, needn't enable it. */ + if (!pcs->fmask) + return 0; func = radix_tree_lookup(&pcs->ftree, fselector); if (!func) return -EINVAL; @@ -384,6 +387,10 @@ static void pcs_disable(struct pinctrl_dev *pctldev, unsigned fselector, int i; pcs = pinctrl_dev_get_drvdata(pctldev); + /* If function mask is null, needn't disable it. */ + if (!pcs->fmask) + return; + func = radix_tree_lookup(&pcs->ftree, fselector); if (!func) { dev_err(pcs->dev, "%s could not find function%i\n", @@ -427,6 +434,10 @@ static int pcs_request_gpio(struct pinctrl_dev *pctldev, int mux_bytes = 0; unsigned data; + /* If function mask is null, return directly. */ + if (!pcs->fmask) + return -ENOTSUPP; + list_for_each_safe(pos, tmp, &pcs->gpiofuncs) { frange = list_entry(pos, struct pcs_gpiofunc_range, node); if (pin >= frange->offset + frange->npins @@ -969,10 +980,17 @@ static int pcs_probe(struct platform_device *pdev) PCS_GET_PROP_U32("pinctrl-single,register-width", &pcs->width, "register width not specified\n"); - PCS_GET_PROP_U32("pinctrl-single,function-mask", &pcs->fmask, - "function register mask not specified\n"); - pcs->fshift = ffs(pcs->fmask) - 1; - pcs->fmax = pcs->fmask >> pcs->fshift; + ret = of_property_read_u32(np, "pinctrl-single,function-mask", + &pcs->fmask); + if (!ret) { + pcs->fshift = ffs(pcs->fmask) - 1; + pcs->fmax = pcs->fmask >> pcs->fshift; + } else { + /* If mask property doesn't exist, function mux is invalid. */ + pcs->fmask = 0; + pcs->fshift = 0; + pcs->fmax = 0; + } ret = of_property_read_u32(np, "pinctrl-single,function-off", &pcs->foff);