From patchwork Thu Mar 14 07:19:44 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 15344 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 7A66723E39 for ; Thu, 14 Mar 2013 07:21:28 +0000 (UTC) Received: from mail-vc0-f176.google.com (mail-vc0-f176.google.com [209.85.220.176]) by fiordland.canonical.com (Postfix) with ESMTP id 30A93A1882E for ; Thu, 14 Mar 2013 07:21:28 +0000 (UTC) Received: by mail-vc0-f176.google.com with SMTP id ib11so132514vcb.35 for ; Thu, 14 Mar 2013 00:21:27 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:x-received:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state; bh=sSy05kTjikS8r8Ok6/MfWJht96WAg9pljWryh96e/y4=; b=EGMJNMnYLZ72nsYif9F3cVPVY6HCEaDiBng6Gdjza56AQzfEudQEW2cVC/WUTn2CVz 1NwclLCrFucTdUqVwq3vKs34MZRNlJHXti5CsR/2NmqBhiMfCYYvyJ9Azs6OYMCY6tmP hpJzD2Mtaj0HAtvEyKgbOpw46aYNLsEpL/VRf758xqpku//AH3zetbhNiKtFRmQ5IyS9 nbBLaZIwSdpIsaM1Q9RZzJsRBCkjmitGHzHl/LlI2qLMBwj3UeB8EnsTOI2f34YZJ8VO PEw05WioYwDH4kxWmXALlSNLxxB1aH94M2gFB0yJnoHmeyKf1jMUsQUPKfDEb4lL4xTg BsKg== X-Received: by 10.220.214.6 with SMTP id gy6mr632152vcb.8.1363245687698; Thu, 14 Mar 2013 00:21:27 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.58.127.98 with SMTP id nf2csp57595veb; Thu, 14 Mar 2013 00:21:27 -0700 (PDT) X-Received: by 10.68.143.167 with SMTP id sf7mr3336504pbb.21.1363245686756; Thu, 14 Mar 2013 00:21:26 -0700 (PDT) Received: from mail-da0-x22b.google.com (mail-da0-x22b.google.com [2607:f8b0:400e:c00::22b]) by mx.google.com with ESMTPS id tm6si2765148pbc.175.2013.03.14.00.21.26 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 14 Mar 2013 00:21:26 -0700 (PDT) Received-SPF: neutral (google.com: 2607:f8b0:400e:c00::22b is neither permitted nor denied by best guess record for domain of haojian.zhuang@linaro.org) client-ip=2607:f8b0:400e:c00::22b; Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400e:c00::22b is neither permitted nor denied by best guess record for domain of haojian.zhuang@linaro.org) smtp.mail=haojian.zhuang@linaro.org Received: by mail-da0-f43.google.com with SMTP id u36so787006dak.2 for ; Thu, 14 Mar 2013 00:21:26 -0700 (PDT) X-Received: by 10.68.117.104 with SMTP id kd8mr3434161pbb.1.1363245686294; Thu, 14 Mar 2013 00:21:26 -0700 (PDT) Received: from localhost.localdomain ([67.198.145.34]) by mx.google.com with ESMTPS id qp13sm1941967pbb.3.2013.03.14.00.21.21 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 14 Mar 2013 00:21:25 -0700 (PDT) From: Haojian Zhuang To: linux@arm.linux.org.uk, linus.walleij@linaro.org, arnd@arndb.de, olof@lixom.net, rob.herring@calxeda.com, linux-arm-kernel@lists.infradead.org, pawel.moll@arm.com, swarren@nvidia.com, john.stultz@linaro.org, tglx@linutronix.de, mturquette@linaro.org Cc: patches@linaro.org, Haojian Zhuang Subject: [PATCH v4 5/5] ARM: config: append arch hi3xxx into multi defconfig Date: Thu, 14 Mar 2013 15:19:44 +0800 Message-Id: <1363245584-24488-6-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1363245584-24488-1-git-send-email-haojian.zhuang@linaro.org> References: <1363245584-24488-1-git-send-email-haojian.zhuang@linaro.org> X-Gm-Message-State: ALoCoQmF8QT4SPeqX38FL2Uh2w8uA1l6x0HgZAG7yb8fKu/xcpaGOKOaQs11aPBrxcxYH1OPncAe Append ARCH_HI3xxx (Hisilicon SoC) into multi_v7_defconfig. Signed-off-by: Haojian Zhuang --- arch/arm/configs/multi_v7_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index e31d442..1891611 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -5,6 +5,7 @@ CONFIG_ARCH_MVEBU=y CONFIG_MACH_ARMADA_370=y CONFIG_MACH_ARMADA_XP=y CONFIG_ARCH_HIGHBANK=y +CONFIG_ARCH_HI3xxx=y CONFIG_ARCH_SOCFPGA=y CONFIG_ARCH_SUNXI=y # CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA is not set