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[2001:1868:205::9]) by mx.google.com with ESMTPS id 3si2666816qgg.56.2014.05.20.07.40.03 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 May 2014 07:40:04 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WmlBp-0004bi-RP; Tue, 20 May 2014 14:38:49 +0000 Received: from mail-pb0-f49.google.com ([209.85.160.49]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WmlBk-0004V0-67 for linux-arm-kernel@lists.infradead.org; Tue, 20 May 2014 14:38:44 +0000 Received: by mail-pb0-f49.google.com with SMTP id jt11so376399pbb.22 for ; Tue, 20 May 2014 07:38:28 -0700 (PDT) X-Received: by 10.66.142.132 with SMTP id rw4mr51874197pab.6.1400596708532; Tue, 20 May 2014 07:38:28 -0700 (PDT) Received: from localhost.localdomain ([140.206.182.114]) by mx.google.com with ESMTPSA id ga1sm3478917pbb.82.2014.05.20.07.38.19 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 20 May 2014 07:38:27 -0700 (PDT) From: Haojian Zhuang To: yanhaifeng@gmail.com, xuwei5@hisilicon.com, arnd@arndb.de, olof@lixom.net, linux-arm-kernel@lists.infradead.org, khilman@kernel.org, jchxue@gmail.com Subject: [PATCH v3 6/6] document: add dt binding on hix5hd2 SoC Date: Tue, 20 May 2014 22:37:05 +0800 Message-Id: <1400596625-16830-7-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1400596625-16830-1-git-send-email-haojian.zhuang@linaro.org> References: <1400596625-16830-1-git-send-email-haojian.zhuang@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140520_073844_264071_09858A45 X-CRM114-Status: UNSURE ( 8.09 ) X-CRM114-Notice: Please train this message. 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X-Original-Sender: haojian.zhuang@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.175 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Add the DT binding of basic SoC on Hisilicon HiX5HD2 SoC. Signed-off-by: Haojian Zhuang --- Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt index 5024992..4b06c1e 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt @@ -7,6 +7,9 @@ Required root node properties: HiP04 D01 Board Required root node properties: - compatible = "hisilicon,hip04-d01"; +HiX5HD2 DKB Board +Required root node properties: + - compatible = "hisilicon,hix5hd2"; Hisilicon system controller @@ -65,3 +68,9 @@ Fabric: Required Properties: - compatible: "hisilicon,hip04-fabric"; - reg: Address and size of Fabric + +Cpu power controller: + +Required Properties: +- compatible: "hisilicon,cpuctrl"; +- reg: Address and size of cpu power controller.