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[2001:1868:205::9]) by mx.google.com with ESMTPS id p1si551708pde.244.2014.08.29.08.56.59 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 29 Aug 2014 08:57:00 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XNOVk-0000oa-4T; Fri, 29 Aug 2014 15:54:48 +0000 Received: from cam-admin0.cambridge.arm.com ([217.140.96.50]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XNOVg-0000QR-V4; Fri, 29 Aug 2014 15:54:45 +0000 Received: from edgewater-inn.cambridge.arm.com (edgewater-inn.cambridge.arm.com [10.1.203.34]) by cam-admin0.cambridge.arm.com (8.12.6/8.12.6) with ESMTP id s7TFsAwo008638; Fri, 29 Aug 2014 16:54:10 +0100 (BST) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id AE9401AE061D; Fri, 29 Aug 2014 16:54:31 +0100 (BST) From: Will Deacon To: linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org Subject: [RFC PATCH 2/7] dma-mapping: replace set_arch_dma_coherent_ops with arch_setup_dma_ops Date: Fri, 29 Aug 2014 16:54:25 +0100 Message-Id: <1409327670-3495-3-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1409327670-3495-1-git-send-email-will.deacon@arm.com> References: <1409327670-3495-1-git-send-email-will.deacon@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140829_085445_360289_D71D2847 X-CRM114-Status: GOOD ( 17.18 ) X-Spam-Score: -5.0 (-----) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-5.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [217.140.96.50 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain Cc: jroedel@suse.de, arnd@arndb.de, Will Deacon , thierry.reding@gmail.com, laurent.pinchart@ideasonboard.com, Varun.Sethi@freescale.com, dwmw2@infradead.org, hdoyu@nvidia.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: will.deacon@arm.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.177 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 set_arch_dma_coherent_ops is called from of_dma_configure in order to swizzle the architectural dma-mapping functions over to a cache-coherent implementation. This is currently implemented only for ARM. In anticipation of re-using this mechanism for IOMMU-backed dma-mapping ops too, this patch replaces the function with a broader arch_setup_dma_ops callback which is also responsible for setting the DMA mask and offset as well as selecting the correct mapping functions. A further advantage of this split is that it nicely isolates the of-specific code from the dma-mapping code, allowing potential reuse by other buses (e.g. PCI) in the future. Signed-off-by: Will Deacon --- arch/arm/include/asm/dma-mapping.h | 20 ++++++++++++++---- drivers/of/platform.c | 42 ++++++++++---------------------------- include/linux/dma-mapping.h | 8 +++----- 3 files changed, 30 insertions(+), 40 deletions(-) diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h index c45b61a4b4a5..936125ef3f3f 100644 --- a/arch/arm/include/asm/dma-mapping.h +++ b/arch/arm/include/asm/dma-mapping.h @@ -121,12 +121,24 @@ static inline unsigned long dma_max_pfn(struct device *dev) } #define dma_max_pfn(dev) dma_max_pfn(dev) -static inline int set_arch_dma_coherent_ops(struct device *dev) +static inline void arch_setup_dma_ops(struct device *dev, u64 mask, + unsigned long offset, bool coherent) { - set_dma_ops(dev, &arm_coherent_dma_ops); - return 0; + dev->coherent_dma_mask = mask; + + /* + * Set dma_mask to coherent_dma_mask by default if the architecture + * code has not set it. + */ + if (!dev->dma_mask) + dev->dma_mask = &dev->coherent_dma_mask; + + dev->dma_pfn_offset = offset; + + if (coherent) + set_dma_ops(dev, &arm_coherent_dma_ops); } -#define set_arch_dma_coherent_ops(dev) set_arch_dma_coherent_ops(dev) +#define arch_setup_dma_ops arch_setup_dma_ops static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) { diff --git a/drivers/of/platform.c b/drivers/of/platform.c index 0197725e033a..484c558c63a6 100644 --- a/drivers/of/platform.c +++ b/drivers/of/platform.c @@ -164,43 +164,23 @@ static void of_dma_configure(struct platform_device *pdev) { u64 dma_addr, paddr, size; int ret; + bool coherent; + unsigned long offset; struct device *dev = &pdev->dev; - /* - * Set default dma-mask to 32 bit. Drivers are expected to setup - * the correct supported dma_mask. - */ - dev->coherent_dma_mask = DMA_BIT_MASK(32); - - /* - * Set it to coherent_dma_mask by default if the architecture - * code has not set it. - */ - if (!dev->dma_mask) - dev->dma_mask = &dev->coherent_dma_mask; + ret = of_dma_get_range(dev->of_node, &dma_addr, &paddr, &size); + offset = ret < 0 ? 0 : PFN_DOWN(paddr - dma_addr); + dev_dbg(dev, "dma_pfn_offset(%#08lx)\n", dev->dma_pfn_offset); - /* - * if dma-coherent property exist, call arch hook to setup - * dma coherent operations. - */ - if (of_dma_is_coherent(dev->of_node)) { - set_arch_dma_coherent_ops(dev); - dev_dbg(dev, "device is dma coherent\n"); - } + coherent = of_dma_is_coherent(dev->of_node); + dev_dbg(dev, "device is%sdma coherent\n", + coherent ? " " : " not "); /* - * if dma-ranges property doesn't exist - just return else - * setup the dma offset + * Set default dma-mask to 32 bit. Drivers are expected to setup + * the correct supported dma_mask. */ - ret = of_dma_get_range(dev->of_node, &dma_addr, &paddr, &size); - if (ret < 0) { - dev_dbg(dev, "no dma range information to setup\n"); - return; - } - - /* DMA ranges found. Calculate and set dma_pfn_offset */ - dev->dma_pfn_offset = PFN_DOWN(paddr - dma_addr); - dev_dbg(dev, "dma_pfn_offset(%#08lx)\n", dev->dma_pfn_offset); + arch_setup_dma_ops(dev, DMA_BIT_MASK(32), offset, coherent); } /** diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h index 931b70986272..0f7f7b68b0db 100644 --- a/include/linux/dma-mapping.h +++ b/include/linux/dma-mapping.h @@ -129,11 +129,9 @@ static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask) extern u64 dma_get_required_mask(struct device *dev); -#ifndef set_arch_dma_coherent_ops -static inline int set_arch_dma_coherent_ops(struct device *dev) -{ - return 0; -} +#ifndef arch_setup_dma_ops +static inline void arch_setup_dma_ops(struct device *dev, u64 mask, + unsigned long offset, bool coherent) { } #endif static inline unsigned int dma_get_max_seg_size(struct device *dev)