From patchwork Tue Sep 2 21:19:10 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Soren Brinkmann X-Patchwork-Id: 36518 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-oa0-f69.google.com (mail-oa0-f69.google.com [209.85.219.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 06C1D202E4 for ; Tue, 2 Sep 2014 21:21:03 +0000 (UTC) Received: by mail-oa0-f69.google.com with SMTP id i7sf41198872oag.0 for ; Tue, 02 Sep 2014 14:21:03 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=3l0iVtRs0cwlGm1g2ESju1QX6THHNe/TT9Z82ib4Evs=; b=Xcmok5me7EvUM3cQjDF9hDmtBzEw2QNFtL2DsBISNDX/dquboboSCiFhexq8jRUi6p MHAcdWqElxF6F7t+EaiOc0UTMJ9NVww7G/Lnve0DZU6/dxX/muuwKAK5dxYdDqwszkqf aStFM4SHPOysADksvVIuJvg/P3nhBsUqqVHg3P8QFcG7Pwvhs1D5AD2izZicEFOEHIDN F1Bd00UNJX8TYEuqScnDVG+V2iZPkkCadxWTjT+IOD5WYl9VpoZ16kfKTcM6qHSn8dDI xbXC4BmPJ8vgRWNj58XfnazHwNUK9QiNS1a+6PzVaI+tkIGmsXwILSVhhjtRhe9tg1Zb bUXg== X-Gm-Message-State: ALoCoQlQarCQbkKAoO8OkqEOPaiHeHA8Iz6gQjxH19xJhvZV6pxtb0LxAQEVHBX7wsaZ23LvKIfq X-Received: by 10.42.62.73 with SMTP id x9mr13942929ich.15.1409692863630; Tue, 02 Sep 2014 14:21:03 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.23.49 with SMTP id 46ls1360415qgo.37.gmail; Tue, 02 Sep 2014 14:21:03 -0700 (PDT) X-Received: by 10.220.95.132 with SMTP id d4mr2557431vcn.33.1409692863289; Tue, 02 Sep 2014 14:21:03 -0700 (PDT) Received: from mail-vc0-x22e.google.com (mail-vc0-x22e.google.com [2607:f8b0:400c:c03::22e]) by mx.google.com with ESMTPS id p18si98165vdg.54.2014.09.02.14.21.03 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 02 Sep 2014 14:21:03 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 2607:f8b0:400c:c03::22e as permitted sender) client-ip=2607:f8b0:400c:c03::22e; Received: by mail-vc0-f174.google.com with SMTP id hy4so7848798vcb.33 for ; Tue, 02 Sep 2014 14:21:03 -0700 (PDT) X-Received: by 10.220.77.65 with SMTP id f1mr1934253vck.48.1409692863207; Tue, 02 Sep 2014 14:21:03 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.221.45.67 with SMTP id uj3csp587424vcb; Tue, 2 Sep 2014 14:21:02 -0700 (PDT) X-Received: by 10.70.43.39 with SMTP id t7mr50489385pdl.101.1409692862353; Tue, 02 Sep 2014 14:21:02 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ox4si8006754pdb.7.2014.09.02.14.21.01 for ; Tue, 02 Sep 2014 14:21:02 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755431AbaIBVVA (ORCPT + 25 others); Tue, 2 Sep 2014 17:21:00 -0400 Received: from mail-pd0-f177.google.com ([209.85.192.177]:33878 "EHLO mail-pd0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755339AbaIBVTf (ORCPT ); Tue, 2 Sep 2014 17:19:35 -0400 Received: by mail-pd0-f177.google.com with SMTP id r10so9431592pdi.8 for ; Tue, 02 Sep 2014 14:19:34 -0700 (PDT) X-Received: by 10.70.128.137 with SMTP id no9mr16177342pdb.143.1409692774709; Tue, 02 Sep 2014 14:19:34 -0700 (PDT) Received: from localhost ([149.199.62.254]) by mx.google.com with ESMTPSA id o2sm6813390pde.30.2014.09.02.14.19.33 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 02 Sep 2014 14:19:33 -0700 (PDT) From: Soren Brinkmann To: Michal Simek , Daniel Lezcano Cc: Russell King , "Rafael J. Wysocki" , =?UTF-8?q?S=C3=B6ren=20Brinkmann?= , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Rob Herring , Mark Rutland , Pawel Moll , Ian Campbell , Kumar Gala Subject: [PATCH v2 5/9] ARM: zynq: Remove invalidate cache for cpu die Date: Tue, 2 Sep 2014 14:19:10 -0700 Message-Id: <1409692754-13437-6-git-send-email-soren.brinkmann@xilinx.com> X-Mailer: git-send-email 2.1.0.1.g27b9230 In-Reply-To: <1409692754-13437-1-git-send-email-soren.brinkmann@xilinx.com> References: <1409692754-13437-1-git-send-email-soren.brinkmann@xilinx.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Original-Sender: linux-kernel-owner@vger.kernel.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 2607:f8b0:400c:c03::22e as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org; dkim=neutral (body hash did not verify) header.i=@ Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Daniel Lezcano As there is no Power management unit on this board, it is not possible to power down a core, just WFI is allowed. There is no point to invalidate the cache and exit coherency. Signed-off-by: Daniel Lezcano Reviewed-and-tested-by: Soren Brinkmann --- arch/arm/mach-zynq/hotplug.c | 32 +------------------------------- 1 file changed, 1 insertion(+), 31 deletions(-) diff --git a/arch/arm/mach-zynq/hotplug.c b/arch/arm/mach-zynq/hotplug.c index 5052c70326e4..366f46c91365 100644 --- a/arch/arm/mach-zynq/hotplug.c +++ b/arch/arm/mach-zynq/hotplug.c @@ -10,35 +10,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include -#include -#include - -#include -#include -#include "common.h" - -static inline void zynq_cpu_enter_lowpower(void) -{ - unsigned int v; - - flush_cache_all(); - asm volatile( - " mcr p15, 0, %1, c7, c5, 0\n" - " dsb\n" - /* - * Turn off coherency - */ - " mrc p15, 0, %0, c1, c0, 1\n" - " bic %0, %0, #0x40\n" - " mcr p15, 0, %0, c1, c0, 1\n" - " mrc p15, 0, %0, c1, c0, 0\n" - " bic %0, %0, %2\n" - " mcr p15, 0, %0, c1, c0, 0\n" - : "=&r" (v) - : "r" (0), "Ir" (CR_C) - : "cc"); -} +#include /* * platform-specific code to shutdown a CPU @@ -47,8 +19,6 @@ static inline void zynq_cpu_enter_lowpower(void) */ void zynq_platform_cpu_die(unsigned int cpu) { - zynq_cpu_enter_lowpower(); - /* * there is no power-control hardware on this platform, so all * we can do is put the core into WFI; this is safe as the calling