From patchwork Tue Mar 3 12:27:47 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 45362 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-la0-f69.google.com (mail-la0-f69.google.com [209.85.215.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id D80BF2142B for ; Tue, 3 Mar 2015 12:31:01 +0000 (UTC) Received: by labhs14 with SMTP id hs14sf13623170lab.0 for ; Tue, 03 Mar 2015 04:31:00 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:subject:date:message-id:cc :precedence:list-id:list-unsubscribe:list-archive:list-post :list-help:list-subscribe:mime-version:content-type :content-transfer-encoding:sender:errors-to:x-original-sender :x-original-authentication-results:mailing-list; bh=olP2W8kOCT9if+wrSTL9awARCFv69KYjVGmEeWLp33E=; b=ZPhIAyCNkPnOCT7nlUDOpm3q3xutz8AAX8SojkU4HorLNMoQsw5z2j7BE14CFfTe2w N+Yk/fue0RNIhgEue7us/rzlGQG1relSpgq/RwTXEtH4KAKQ+J6A09wdEk3fAaVrpr5z KXZevp1MZK6TSYWz+VZsV3yF0AtdgAp4JI4a2pAmhpR6302Adk6GS90hDgNYBzbl2hqV jnmnmFIlQwYTZEKTsJwL4ut8ydA7iibYo1hcb0IYYqdxKc12bHhuQMp2gw2PDfsA2ErE PIFlU84QaGTnUSTyl5dq07I0kucs7CouGljvO/3nXpl8qp73+lIaBfGnLdk03rt0yLpE mFGg== X-Gm-Message-State: ALoCoQlijps9bbw5nr8foJn/bdwP4OnWZPKnhVmKGyf0/YMVEtqpLfIftwuA2QUi/0/E/S4zHPZY X-Received: by 10.152.6.41 with SMTP id x9mr4524766lax.10.1425385860791; Tue, 03 Mar 2015 04:31:00 -0800 (PST) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.5.38 with SMTP id p6ls28735lap.17.gmail; Tue, 03 Mar 2015 04:31:00 -0800 (PST) X-Received: by 10.112.123.133 with SMTP id ma5mr29244088lbb.122.1425385860649; Tue, 03 Mar 2015 04:31:00 -0800 (PST) Received: from mail-la0-f52.google.com (mail-la0-f52.google.com. [209.85.215.52]) by mx.google.com with ESMTPS id pw1si427333lbb.72.2015.03.03.04.31.00 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 03 Mar 2015 04:31:00 -0800 (PST) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.52 as permitted sender) client-ip=209.85.215.52; Received: by labgq15 with SMTP id gq15so37055973lab.6 for ; Tue, 03 Mar 2015 04:31:00 -0800 (PST) X-Received: by 10.152.28.5 with SMTP id x5mr28143708lag.112.1425385860560; Tue, 03 Mar 2015 04:31:00 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.35.133 with SMTP id h5csp531195lbj; Tue, 3 Mar 2015 04:30:59 -0800 (PST) X-Received: by 10.70.90.133 with SMTP id bw5mr12701219pdb.93.1425385858128; Tue, 03 Mar 2015 04:30:58 -0800 (PST) Received: from bombadil.infradead.org (bombadil.infradead.org. [2001:1868:205::9]) by mx.google.com with ESMTPS id dl3si803471pbb.121.2015.03.03.04.30.56 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 03 Mar 2015 04:30:58 -0800 (PST) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YSlwQ-0002L1-Om; Tue, 03 Mar 2015 12:28:50 +0000 Received: from mail-wg0-f52.google.com ([74.125.82.52]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YSlwN-0002EQ-EC for linux-arm-kernel@lists.infradead.org; Tue, 03 Mar 2015 12:28:48 +0000 Received: by wgha1 with SMTP id a1so39652109wgh.12 for ; Tue, 03 Mar 2015 04:28:25 -0800 (PST) X-Received: by 10.194.86.194 with SMTP id r2mr70435621wjz.41.1425385705518; Tue, 03 Mar 2015 04:28:25 -0800 (PST) Received: from ards-macbook-pro.local ([213.143.61.132]) by mx.google.com with ESMTPSA id fm10sm2274906wib.7.2015.03.03.04.28.23 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 03 Mar 2015 04:28:24 -0800 (PST) From: Ard Biesheuvel To: catalin.marinas@arm.com, will.deacon@arm.com, mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH] arm64: remove __switch_data object from head.S Date: Tue, 3 Mar 2015 13:27:47 +0100 Message-Id: <1425385667-16082-1-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 1.8.3.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150303_042847_641350_7EC46EE8 X-CRM114-Status: GOOD ( 10.62 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [74.125.82.52 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [74.125.82.52 listed in wl.mailspike.net] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders Cc: Ard Biesheuvel X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ard.biesheuvel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.52 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 This removes the confusing __switch_data object from head.S, and replaces it with standard PC-relative references to the various symbols it encapsulates. Signed-off-by: Ard Biesheuvel --- arch/arm64/kernel/head.S | 35 +++++++++++++---------------------- 1 file changed, 13 insertions(+), 22 deletions(-) diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 66675d27fea3..2afaf6b8e4e8 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -263,7 +263,7 @@ ENTRY(stext) * On return, the CPU will be ready for the MMU to be turned on and * the TCR will have been set. */ - ldr x27, __switch_data // address to jump to after + ldr x27, =__mmap_switched // address to jump to after // MMU has been enabled adrp lr, __enable_mmu // return (PIC) address add lr, lr, #:lo12:__enable_mmu @@ -397,37 +397,28 @@ __create_page_tables: ENDPROC(__create_page_tables) .ltorg - .align 3 - .type __switch_data, %object -__switch_data: - .quad __mmap_switched - .quad __bss_start // x6 - .quad __bss_stop // x7 - .quad processor_id // x4 - .quad __fdt_pointer // x5 - .quad memstart_addr // x6 - .quad init_thread_union + THREAD_START_SP // sp - /* - * The following fragment of code is executed with the MMU on in MMU mode, and - * uses absolute addresses; this is not position independent. + * The following fragment of code is executed with the MMU enabled. */ __mmap_switched: - adr x3, __switch_data + 8 + adrp x6, __bss_start + adrp x7, __bss_stop + add x6, x6, :lo12:__bss_start + add x7, x7, :lo12:__bss_stop - ldp x6, x7, [x3], #16 1: cmp x6, x7 b.hs 2f str xzr, [x6], #8 // Clear BSS b 1b 2: - ldp x4, x5, [x3], #16 - ldr x6, [x3], #8 - ldr x16, [x3] + ldr x16, =(init_thread_union + THREAD_START_SP) mov sp, x16 - str x22, [x4] // Save processor ID - str x21, [x5] // Save FDT pointer - str x24, [x6] // Save PHYS_OFFSET + adrp x4, processor_id + adrp x5, __fdt_pointer + adrp x6, memstart_addr + str x22, [x4, :lo12:processor_id] // Save processor ID + str x21, [x5, :lo12:__fdt_pointer] // Save FDT pointer + str x24, [x6, :lo12:memstart_addr] // Save PHYS_OFFSET mov x29, #0 b start_kernel ENDPROC(__mmap_switched)