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[209.132.180.67]) by mx.google.com with ESMTP id ac10si19804452pac.147.2015.03.31.08.10.22; Tue, 31 Mar 2015 08:10:50 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754536AbbCaPIs (ORCPT + 27 others); Tue, 31 Mar 2015 11:08:48 -0400 Received: from static.88-198-71-155.clients.your-server.de ([88.198.71.155]:48077 "EHLO socrates.bennee.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754477AbbCaPIm (ORCPT ); Tue, 31 Mar 2015 11:08:42 -0400 Received: from localhost ([127.0.0.1] helo=zen.linaroharston) by socrates.bennee.com with esmtp (Exim 4.80) (envelope-from ) id 1YcysQ-0005gI-U3; Tue, 31 Mar 2015 18:18:55 +0200 From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, marc.zyngier@arm.com, peter.maydell@linaro.org, agraf@suse.de, drjones@redhat.com, pbonzini@redhat.com, zhichao.huang@linaro.org Cc: jan.kiszka@siemens.com, dahi@linux.vnet.ibm.com, r65777@freescale.com, bp@suse.de, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 03/10] KVM: arm: guest debug, define API headers Date: Tue, 31 Mar 2015 16:08:01 +0100 Message-Id: <1427814488-28467-4-git-send-email-alex.bennee@linaro.org> X-Mailer: git-send-email 2.3.4 In-Reply-To: <1427814488-28467-1-git-send-email-alex.bennee@linaro.org> References: <1427814488-28467-1-git-send-email-alex.bennee@linaro.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 127.0.0.1 X-SA-Exim-Mail-From: alex.bennee@linaro.org X-SA-Exim-Scanned: No (on socrates.bennee.com); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: alex.bennee@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.54 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This commit defines the API headers for guest debugging. There are two architecture specific debug structures: - kvm_guest_debug_arch, allows us to pass in HW debug registers - kvm_debug_exit_arch, signals the exact debug exit and pc The type of debugging being used is control by the architecture specific control bits of the kvm_guest_debug->control flags in the ioctl structure. Signed-off-by: Alex Bennée --- v2 - expose hsr and pc directly to user-space diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h index 3ef77a4..6ee70a0 100644 --- a/arch/arm64/include/uapi/asm/kvm.h +++ b/arch/arm64/include/uapi/asm/kvm.h @@ -100,10 +100,24 @@ struct kvm_sregs { struct kvm_fpu { }; +/* + * See ARM ARM D7.3: Debug Registers + * + * The control registers are architecturally defined as 32 bits but are + * stored as 64 bit values along side the value registers and aligned + * with the rest 64 bit registers in the normal CPU context. + */ +#define KVM_ARM_NDBG_REGS 16 struct kvm_guest_debug_arch { + __u64 dbg_bcr[KVM_ARM_NDBG_REGS]; + __u64 dbg_bvr[KVM_ARM_NDBG_REGS]; + __u64 dbg_wcr[KVM_ARM_NDBG_REGS]; + __u64 dbg_wvr[KVM_ARM_NDBG_REGS]; }; struct kvm_debug_exit_arch { + __u64 pc; + __u32 hsr; }; struct kvm_sync_regs { @@ -207,4 +221,11 @@ struct kvm_arch_memory_slot { #endif +/* + * Architecture related debug defines - upper 16 bits of + * kvm_guest_debug->control + */ +#define KVM_GUESTDBG_USE_SW_BP __KVM_GUESTDBG_USE_SW_BP +#define KVM_GUESTDBG_USE_HW_BP __KVM_GUESTDBG_USE_HW_BP + #endif /* __ARM_KVM_H__ */