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[81.129.173.55]) by smtp.gmail.com with ESMTPSA id qq1sm2359327wjc.0.2015.07.22.06.04.19 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 22 Jul 2015 06:04:20 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: kernel@stlinux.com, mturquette@linaro.org, sboyd@codeaurora.org, devicetree@vger.kernel.org, geert@linux-m68k.org, maxime.ripard@free-electrons.com, s.hauer@pengutronix.de, Lee Jones Subject: [PATCH v7 1/5] ARM: sti: stih407-family: Supply defines for CLOCKGEN A0 Date: Wed, 22 Jul 2015 14:04:11 +0100 Message-Id: <1437570255-21049-2-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1437570255-21049-1-git-send-email-lee.jones@linaro.org> References: <1437570255-21049-1-git-send-email-lee.jones@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.169 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , There are 2 LMI clocks generated by CLOCKGEN A0. We wish to control them individually and need to use these indexes to do so. Signed-off-by: Lee Jones --- include/dt-bindings/clock/stih407-clks.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/dt-bindings/clock/stih407-clks.h b/include/dt-bindings/clock/stih407-clks.h index 7af2b71..082edd9 100644 --- a/include/dt-bindings/clock/stih407-clks.h +++ b/include/dt-bindings/clock/stih407-clks.h @@ -5,6 +5,10 @@ #ifndef _DT_BINDINGS_CLK_STIH407 #define _DT_BINDINGS_CLK_STIH407 +/* CLOCKGEN A0 */ +#define CLK_IC_LMI0 0 +#define CLK_IC_LMI1 1 + /* CLOCKGEN C0 */ #define CLK_ICN_GPU 0 #define CLK_FDMA 1