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[80.11.198.90]) by smtp.gmail.com with ESMTPSA id b124sm3568725wmb.1.2016.04.28.01.22.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 28 Apr 2016 01:22:43 -0700 (PDT) From: Eric Auger To: eric.auger@st.com, eric.auger@linaro.org, robin.murphy@arm.com, alex.williamson@redhat.com, will.deacon@arm.com, joro@8bytes.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, christoffer.dall@linaro.org, linux-arm-kernel@lists.infradead.org Cc: patches@linaro.org, linux-kernel@vger.kernel.org, Bharat.Bhushan@freescale.com, pranav.sawargaonkar@gmail.com, p.fedin@samsung.com, iommu@lists.linux-foundation.org, Jean-Philippe.Brucker@arm.com, julien.grall@arm.com Subject: [PATCH v8 5/8] genirq/irq: introduce msi_doorbell_info Date: Thu, 28 Apr 2016 08:22:07 +0000 Message-Id: <1461831730-5575-6-git-send-email-eric.auger@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1461831730-5575-1-git-send-email-eric.auger@linaro.org> References: <1461831730-5575-1-git-send-email-eric.auger@linaro.org> The purpose is to be able to retrieve the MSI doorbells of an irqchip. This is now needed since on some platforms those doorbells must be iommu mapped (in case the MSIs transit through an IOMMU that do not bypass those transactions). The assumption is there is a maximum of one doorbell region per cpu. A doorbell region is characterized by its physical address base, size and IOMMU protection flag. Those 2 last characteristics are shared among all doorbells. irq_chip msi_doorbell_info callback enables to retrieve the doorbells of the irqchip. Signed-off-by: Eric Auger --- v7 -> v8: - size and prot now are shared among all doorbells - doorbells now directly points to a percpu phys_addr_t v7: creation --- include/linux/irq.h | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) -- 1.9.1 diff --git a/include/linux/irq.h b/include/linux/irq.h index c4de623..5dbb26d 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -312,6 +312,19 @@ static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d) return d->hwirq; } +/* + * Describe all the MSI doorbell regions for an irqchip. + * A single doorbell region per cpu is assumed. + * In case a single doorbell is supported for the whole irqchip, + * the region is described in as cpu #0's one + */ +struct irq_chip_msi_doorbell_info { + phys_addr_t __percpu *percpu_doorbells; /* per cpu base address */ + size_t size; /* size of a each doorbell */ + int prot; /* iommu protection flag */ + int nb_doorbells; +}; + /** * struct irq_chip - hardware interrupt chip descriptor * @@ -349,6 +362,7 @@ static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d) * @irq_get_irqchip_state: return the internal state of an interrupt * @irq_set_irqchip_state: set the internal state of a interrupt * @irq_set_vcpu_affinity: optional to target a vCPU in a virtual machine + * @msi_doorbell_info: return the MSI doorbell info * @ipi_send_single: send a single IPI to destination cpus * @ipi_send_mask: send an IPI to destination cpus in cpumask * @flags: chip specific flags @@ -394,7 +408,8 @@ struct irq_chip { int (*irq_set_irqchip_state)(struct irq_data *data, enum irqchip_irq_state which, bool state); int (*irq_set_vcpu_affinity)(struct irq_data *data, void *vcpu_info); - + struct irq_chip_msi_doorbell_info *(*msi_doorbell_info)( + struct irq_data *data); void (*ipi_send_single)(struct irq_data *data, unsigned int cpu); void (*ipi_send_mask)(struct irq_data *data, const struct cpumask *dest);