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[188.178.240.98]) by mx.google.com with ESMTPSA id mx10sm11863648lbb.20.2015.06.30.11.50.29 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 30 Jun 2015 11:50:30 -0700 (PDT) Date: Tue, 30 Jun 2015 20:50:31 +0200 From: Christoffer Dall To: Marc Zyngier Subject: Re: Regular oops on shutdown of KVM/ARM64 machines with VGA device Message-ID: <20150630185031.GA23001@cbox> References: <20150629100304.GB18931@leverpostej> <55914033.5060008@arm.com> <559270D3.8030305@arm.com> <5592C1BB.9090106@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <5592C1BB.9090106@arm.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150630_115054_314101_55614AD9 X-CRM114-Status: GOOD ( 21.32 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.215.46 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.215.46 listed in wl.mailspike.net] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Cc: Mark Rutland , Dirk =?iso-8859-1?Q?M=FCller?= , "linux-arm-kernel@lists.infradead.org" , "agraf@suse.de" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: christoffer.dall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.41 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 On Tue, Jun 30, 2015 at 05:20:11PM +0100, Marc Zyngier wrote: > On 30/06/15 17:16, Dirk Müller wrote: > > Hi Marc, > > > >> Can try the following patch? > > > > [..] > > > > Thanks a lot for the quick patch, from a brief testing this seems to > > fix the issue (on a 4k kernel). I'll retest this in our original > > configuration (which was 64k) but so far I don't see a reason why it > > shouldn't fix the issue. > > Awesome. Mind if I put your Tested-by on the patch? > Looks to me like the definition of pmd_huge() on arm64 is broken; pretty sure when I reviewed this original patch I followed the path of both pmd_huge() and pmd_trans_huge() and checked that they don't return true if the entry is clear. This happens to be the case on both arm and x86, and I probably only looked at the arm code and not the arm64 code. I'm fine with this patch, but I think we should also merge the following, since by definition, a clear pmd cannot also be a huge pmd: Thanks, -Christoffer diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c index 2de9d2e..779520b 100644 --- a/arch/arm64/mm/hugetlbpage.c +++ b/arch/arm64/mm/hugetlbpage.c @@ -40,7 +40,7 @@ int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep) int pmd_huge(pmd_t pmd) { - return !(pmd_val(pmd) & PMD_TABLE_BIT); + return pmd_val(pmd) && !(pmd_val(pmd) & PMD_TABLE_BIT); } int pud_huge(pud_t pud)