From patchwork Tue Sep 27 19:08:04 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoffer Dall X-Patchwork-Id: 77067 Delivered-To: patch@linaro.org Received: by 10.140.106.72 with SMTP id d66csp42643qgf; Tue, 27 Sep 2016 12:10:04 -0700 (PDT) X-Received: by 10.66.65.138 with SMTP id x10mr11131766pas.28.1475003404352; Tue, 27 Sep 2016 12:10:04 -0700 (PDT) Return-Path: Received: from bombadil.infradead.org (bombadil.infradead.org. [2001:1868:205::9]) by mx.google.com with ESMTPS id x80si3924920pff.54.2016.09.27.12.10.04 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 27 Sep 2016 12:10:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) smtp.mailfrom=linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1boxk5-0002ih-Vj; Tue, 27 Sep 2016 19:08:37 +0000 Received: from mail-wm0-x234.google.com ([2a00:1450:400c:c09::234]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1boxjk-0002cy-U7 for linux-arm-kernel@lists.infradead.org; Tue, 27 Sep 2016 19:08:18 +0000 Received: by mail-wm0-x234.google.com with SMTP id l132so30053754wmf.1 for ; Tue, 27 Sep 2016 12:07:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=UxP5jBXJyVex1vz0SJhGyaw/KOX+Y9bd3JsovdCtMKU=; b=DZ65B0hEqSIa447w8+w2SvULUXH9dREDnfnMI/SvsXZvJAF8TLVeFzOTLB+zwFXHyQ VrUU+Fag27FXV8Lwzp8uU5simdbgTB+XkUhxfV4sHXZvawQkHfhfDPlRw/vZEEqnOvJn VvHvyUlmCBR1AMF4u5Soz4M2ieBZ/3ADoYfRk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=UxP5jBXJyVex1vz0SJhGyaw/KOX+Y9bd3JsovdCtMKU=; b=QSbMPkpijo9B/TvzSail1Zq8TU6osnUgcUv8ffSMFIg6WWhPpQ+25DexGmK8xbKhgj VIYL3Brzxcp8xMrIRTJ1m3yjbTlgt56BJIXbJgWXULGz/knE475Xdfl0Sann40EOSr4U 138110V3fNOKIhtIsaJZKkeAzHxUQgRWRAmFCflaDJYB6Odzxpr/9wDUD9jBFSG3vQZu pDWEDKPa4nsP+mDwrAUaQUsQxj4+hwHXgLjhaFN8VgJIehF1mKBIY795FsXa0tsDi1vj l5wSYbs2DtLN83LBGomogh04LWXZvbo/Fbv3KU+WgSdBpvD98eyAdHcV4hJ6iDMmlktG MxXg== X-Gm-Message-State: AA6/9Rkk7Xud5To1N3Ri/ES0mHYWhtTnEab//vHiYWYA4w2tHYxPF90ZtvsYz/JglDLZQJdK X-Received: by 10.28.132.71 with SMTP id g68mr4220764wmd.20.1475003275211; Tue, 27 Sep 2016 12:07:55 -0700 (PDT) Received: from localhost.localdomain ([94.18.191.146]) by smtp.gmail.com with ESMTPSA id 137sm18270723wmi.16.2016.09.27.12.07.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 27 Sep 2016 12:07:54 -0700 (PDT) From: Christoffer Dall To: Alexander Graf Subject: [PATCH 1/3] KVM: arm/arm64: Cleanup the arch timer code's irqchip checking Date: Tue, 27 Sep 2016 21:08:04 +0200 Message-Id: <20160927190806.22988-2-christoffer.dall@linaro.org> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20160927190806.22988-1-christoffer.dall@linaro.org> References: <20160927190806.22988-1-christoffer.dall@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160927_120817_147713_9AA84936 X-CRM114-Status: GOOD ( 16.28 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2a00:1450:400c:c09:0:0:0:234 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kvm@vger.kernel.org, Marc Zyngier , linux-arm-kernel@lists.infradead.org, Paolo Bonzini , kvmarm@lists.cs.columbia.edu, Christoffer Dall MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org Currently we check if we have an in-kernel irqchip and if the vgic was properly implemented several places in the arch timer code. But, we already predicate our enablement of the arm timers on having a valid and initialized gic, so we can simply check if the timers are enabled or not. This also gets rid of the ugly "error that's not an error but used to signal that the timer shouldn't poke the gic" construct we have. Signed-off-by: Christoffer Dall --- virt/kvm/arm/arch_timer.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) -- 2.9.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c index 27a1f63..824ed26 100644 --- a/virt/kvm/arm/arch_timer.c +++ b/virt/kvm/arm/arch_timer.c @@ -171,8 +171,6 @@ static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level) int ret; struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; - BUG_ON(!vgic_initialized(vcpu->kvm)); - timer->active_cleared_last = false; timer->irq.level = new_level; trace_kvm_timer_update_irq(vcpu->vcpu_id, timer->irq.irq, @@ -187,7 +185,7 @@ static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level) * Check if there was a change in the timer state (should we raise or lower * the line level to the GIC). */ -static int kvm_timer_update_state(struct kvm_vcpu *vcpu) +static void kvm_timer_update_state(struct kvm_vcpu *vcpu) { struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; @@ -197,13 +195,11 @@ static int kvm_timer_update_state(struct kvm_vcpu *vcpu) * because the guest would never see the interrupt. Instead wait * until we call this function from kvm_timer_flush_hwstate. */ - if (!vgic_initialized(vcpu->kvm) || !timer->enabled) - return -ENODEV; + if (!timer->enabled) + return; if (kvm_timer_should_fire(vcpu) != timer->irq.level) kvm_timer_update_irq(vcpu, !timer->irq.level); - - return 0; } /* @@ -255,9 +251,11 @@ void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu) bool phys_active; int ret; - if (kvm_timer_update_state(vcpu)) + if (unlikely(!timer->enabled)) return; + kvm_timer_update_state(vcpu); + /* * If we enter the guest with the virtual input level to the VGIC * asserted, then we have already told the VGIC what we need to, and