mbox series

[v2,0/3] nvmem: qfprom: Add binding updates and power-domain handling

Message ID 1627560036-1626-1-git-send-email-rnayak@codeaurora.org
Headers show
Series nvmem: qfprom: Add binding updates and power-domain handling | expand

Message

Rajendra Nayak July 29, 2021, noon UTC 
v2:
* pm_runtime calls made unconditionally, should work even without the power-domains property in DT
* Added the missing pm_runtime_disable() handling
* DT patch rebased on msm/for-next

--
qfprom devices on sc7280 have an additional requirement to vote on a power-domain
performance state to reliably blow fuses. Add the binding updates and handle this in
the driver, also add the DT node for sc7280 platform.

Rajendra Nayak (3):
  dt-bindings: nvmem: qfprom: Add optional power-domains property
  nvmem: qfprom: sc7280: Handle the additional power-domains vote
  arm64: dts: qcom: sc7280: Add qfprom node

 .../devicetree/bindings/nvmem/qcom,qfprom.yaml     |  3 +++
 arch/arm64/boot/dts/qcom/sc7280.dtsi               | 13 +++++++++++
 drivers/nvmem/qfprom.c                             | 26 ++++++++++++++++++++++
 3 files changed, 42 insertions(+)

Comments

Doug Anderson July 29, 2021, 4:24 p.m. UTC | #1 
Hi,

On Thu, Jul 29, 2021 at 5:01 AM Rajendra Nayak <rnayak@codeaurora.org> wrote:
>
> Add the qfprom node and its properties for the sc7280 SoC.
>
> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
> ---
>  arch/arm64/boot/dts/qcom/sc7280.dtsi | 13 +++++++++++++
>  1 file changed, 13 insertions(+)

Peachy! I guess a future patch will add things like USB2 trim and GPU
speed bin definitions?

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Rajendra Nayak July 30, 2021, 5:57 a.m. UTC | #2 
On 7/29/2021 9:49 PM, Doug Anderson wrote:
> Hi,
> 
> On Thu, Jul 29, 2021 at 5:01 AM Rajendra Nayak <rnayak@codeaurora.org> wrote:
>>
>> qfprom devices on some SoCs need to vote on the performance state
>> of a power-domain, so add the power-domains optional property to the
>> bindings
>>
>> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
>> ---
>>   Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml | 3 +++
>>   1 file changed, 3 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
>> index 861b205..a498a08 100644
>> --- a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
>> +++ b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
>> @@ -51,6 +51,9 @@ properties:
>>     vcc-supply:
>>       description: Our power supply.
>>
>> +  power-domains:
>> +    description: A phandle to a power domain node.
>> +
> 
> I'm trying to channel my inner Rob here by saying that this
> description doesn't add anything and this should just be:

Thanks, I trust the inner Rob in you :), so I'll drop the description
and repost.

> 
> power-domains:
>    maxItems: 1
> 
> Here's an example of Rob saying this:
> 
> https://lore.kernel.org/linux-devicetree/20210712151322.GA1931925@robh.at.kernel.org/
> 
> Other than that, feel free to add my "Reviewed-by" tag.
> 
> -Doug
>
Rajendra Nayak July 30, 2021, 5:58 a.m. UTC | #3 
On 7/29/2021 9:54 PM, Doug Anderson wrote:
> Hi,

> 

> On Thu, Jul 29, 2021 at 5:01 AM Rajendra Nayak <rnayak@codeaurora.org> wrote:

>>

>> Add the qfprom node and its properties for the sc7280 SoC.

>>

>> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>

>> ---

>>   arch/arm64/boot/dts/qcom/sc7280.dtsi | 13 +++++++++++++

>>   1 file changed, 13 insertions(+)

> 

> Peachy! I guess a future patch will add things like USB2 trim and GPU

> speed bin definitions?


Right, I left those out for a future patch.

> 

> Reviewed-by: Douglas Anderson <dianders@chromium.org>


Thanks
> 


-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation