Message ID | 1659526134-22978-1-git-send-email-quic_krichai@quicinc.com |
---|---|
Headers | show |
Series | PCI: Restrict pci transactions after pci suspend | expand |
On Wed, Aug 03, 2022 at 04:58:51PM +0530, Krishna chaitanya chundru wrote: > If the endpoint device state is D0 and irq's are not freed, then > kernel try to mask interrupts in system suspend path by writing in to > the vector table (for MSIX interrupts) and config space (for MSI's). If clocks are being turned off while the PCI core is still accessing the device, I think that means qcom suspend is not implemented correctly. > These transactions are initiated in the pm suspend after pcie clocks got > disabled as part of platform driver pm suspend call. Due to it, these > transactions are resulting in un-clocked access and eventually to crashes. > > So added a logic in qcom driver to restrict these unclocked access. > And updated the logic to check the link state before masking > or unmasking the interrupts. > > And some devices are taking time to settle the link in L1ss, so added a > retry logic in the suspend ops. > > Krishna chaitanya chundru (3): > PCI: qcom: Add system PM support > PCI: qcom: Restrict pci transactions after pci suspend > PCI: qcom: Add retry logic for link to be stable in L1ss > > drivers/pci/controller/dwc/pcie-designware-host.c | 14 ++- > drivers/pci/controller/dwc/pcie-qcom.c | 117 +++++++++++++++++++++- > 2 files changed, 127 insertions(+), 4 deletions(-) > > -- > 2.7.4 >