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[v3,0/4] arm64: dts: qcom: qrb5165-rb5: use GPIO as SPI0 CS

Message ID 20210209202849.1148569-1-dmitry.baryshkov@linaro.org
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Series arm64: dts: qcom: qrb5165-rb5: use GPIO as SPI0 CS | expand

Message

Dmitry Baryshkov Feb. 9, 2021, 8:28 p.m. UTC 
GENI SPI controller shows several issues if it manages the CS on its own
(see 37dd4b777942 ("arm64: dts: qcom: sc7180: Provide pinconf for SPI to
use GPIO for CS") for the details). Configure SPI0 CS pin as a GPIO.

Changes since v2:
 - Move pinctrl-names to the board file.
 - Reorder CS/CS-gpio/data-clk nodes to follow alphabetical sort.

Changes since v1:
 - Split sm8250's spi pin config into mux/config parts, split away CS
   handling from main SPI pinctrl nodes.

----------------------------------------------------------------
Dmitry Baryshkov (4):
      arm64: dts: qcom: sm8250: split spi pinctrl config
      arm64: dts: qcom: sm8250: further split of spi pinctrl config
      arm64: dts: qcom: sm8250: add pinctrl for SPI using GPIO as a CS
      arm64: dts: qcom: qrb5165-rb5: switch into using GPIO for SPI0 CS

 arch/arm64/boot/dts/qcom/qrb5165-rb5.dts |  13 +
 arch/arm64/boot/dts/qcom/sm8250.dtsi     | 521 +++++++++++++++----------------
 2 files changed, 273 insertions(+), 261 deletions(-)