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[00/10] interconnect: osm-l3: SC8280XP L3 and DDR scaling

Message ID 20221028034155.5580-1-quic_bjorande@quicinc.com
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Series interconnect: osm-l3: SC8280XP L3 and DDR scaling | expand

Message

Bjorn Andersson Oct. 28, 2022, 3:41 a.m. UTC 
The SC8280XP currently shows depressing results in memory benchmarks.
Fix this by introducing support for the platform in the OSM (and EPSS)
L3 driver and support for the platform in the bwmon binding.

Then add the necessary nodes and values throughout the sc8280xp and
sa8540p dtsi files to make the various devices on these platforms scale
both L3, memory bus and DDR.

Bjorn Andersson (10):
  interconnect: qcom: osm-l3: Use platform-independent node ids
  interconnect: qcom: osm-l3: Squash common descriptors
  interconnect: qcom: osm-l3: Add per-core EPSS L3 support
  interconnect: qcom: osm-l3: Simplify osm_l3_set()
  dt-bindings: interconnect: Add sm8350, sc8280xp and generic OSM L3
    compatibles
  arm64: dts: qcom: Align with generic osm-l3/epss-l3
  arm64: dts: qcom: sc8280xp: Add epss_l3 node
  arm64: dts: qcom: sc8280xp: Set up L3 scaling
  dt-bindings: interconnect: qcom,msm8998-bwmon: Add sc8280xp bwmon
    instances
  arm64: dts: qcom: sc8280xp: Add bwmon instances

 .../interconnect/qcom,msm8998-bwmon.yaml      |   5 +
 .../bindings/interconnect/qcom,osm-l3.yaml    |  22 ++-
 arch/arm64/boot/dts/qcom/sa8540p.dtsi         |  39 +++++
 arch/arm64/boot/dts/qcom/sc7180.dtsi          |   2 +-
 arch/arm64/boot/dts/qcom/sc7280.dtsi          |   2 +-
 arch/arm64/boot/dts/qcom/sc8280xp.dtsi        | 152 ++++++++++++++++++
 arch/arm64/boot/dts/qcom/sdm845.dtsi          |   2 +-
 arch/arm64/boot/dts/qcom/sm8150.dtsi          |   2 +-
 arch/arm64/boot/dts/qcom/sm8250.dtsi          |   2 +-
 drivers/interconnect/qcom/osm-l3.c            | 126 ++++-----------
 10 files changed, 251 insertions(+), 103 deletions(-)