[v2,0/8] Add support for Qualcomm's legacy IOMMU v2

This series adds support for handling "v2" firmware's IOMMU, found
on at least MSM8956 and MSM8976 (some other SoCs also need the same
but I honestly don't remember which ones precisely).

This is strictly required to get functional IOMMUs on these SoCs.

I'm sorry for not performing a much needed schema conversion on
qcom,iommu.txt, but I really didn't have time to do that :-(

This series was tested on Sony Xperia X and X Compact (MSM8956):
ADSP, LPASS, Venus, MSS, MDP and GPU are happy :-)

Changes in v2:
 - Added back Marijn's notes (sorry man!)
 - Added ARM_SMMU_CB_FSRRESTORE definition
 - Changed context bank reset to properly set FSR and FSRRESTORE

AngeloGioacchino Del Regno (8):
  dt-bindings: iommu: qcom,iommu: Document qcom,ctx-num property
  iommu/qcom: Use the asid read from device-tree if specified
  iommu/arm-smmu: Add definition for ARM_SMMU_CB_FSRRESTORE
  iommu/qcom: Properly reset the IOMMU context
  iommu/qcom: Index contexts by asid number to allow asid 0
  dt-bindings: iommu: qcom,iommu: Document QSMMU v2 compatibles
  iommu/qcom: Add support for QSMMUv2 and QSMMU-500 secured contexts
  dt-bindings: iommu: qcom,iommu: Document MSM8976 compatible

 .../devicetree/bindings/iommu/qcom,iommu.txt  | 11 ++-
 drivers/iommu/arm/arm-smmu/arm-smmu.h         |  1 +
 drivers/iommu/arm/arm-smmu/qcom_iommu.c       | 78 +++++++++++++++----
 3 files changed, 71 insertions(+), 19 deletions(-)

On 11/11/2022 15:59, AngeloGioacchino Del Regno wrote:
> Add a new "qcom,ctx-num" property to force an ASID number on IOMMU
> contexts where required.
> 
> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
> [Marijn: Rebased over next-20221111]
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

Il 11/11/22 16:18, Robin Murphy ha scritto:
> On 11/11/2022 2:59 pm, AngeloGioacchino Del Regno wrote:
>> In preparation for adding a proper context bank reset sequence in
>> qcom_iommu, add a definition for the implementation defined Fault
>> Status Restore register (FSRRESTORE).
> 
> It's not implementation defined, it's architectural. But I don't follow why we 
> should need this. If we're resetting FSR, we don't need to restore any previous 
> value to it; all we want to do is clear it, which we do already via its own mechanism.
> 

The spec says "configurations" -> implementation defined whether the system
implements stage 1 translation.... and that's how I got confused about it, sorry.

Thanks for the review, this clears up my doubts: I can reset FSR without caring
about FSRRESTORE.
I'll send a v3 ASAP.

Regards,
Angelo

> Thanks,
> Robin.
> 
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>> ---
>>   drivers/iommu/arm/arm-smmu/arm-smmu.h | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.h 
>> b/drivers/iommu/arm/arm-smmu/arm-smmu.h
>> index 703fd5817ec1..5015138799c5 100644
>> --- a/drivers/iommu/arm/arm-smmu/arm-smmu.h
>> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.h
>> @@ -219,6 +219,7 @@ enum arm_smmu_cbar_type {
>>                        ARM_SMMU_FSR_TF |        \
>>                        ARM_SMMU_FSR_IGN)
>> +#define ARM_SMMU_CB_FSRRESTORE        0x5c
>>   #define ARM_SMMU_CB_FAR            0x60
>>   #define ARM_SMMU_CB_FSYNR0        0x68