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[v2,0/3] arm64: dts: qcom: sm6125: QUPs, SPI and Seine I2C buses

Message ID 20221216233408.1283581-1-marijn.suijten@somainline.org
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Series arm64: dts: qcom: sm6125: QUPs, SPI and Seine I2C buses | expand

Message

Marijn Suijten Dec. 16, 2022, 11:34 p.m. UTC
Introduce Qualcomm Universal Peripheral support on SM6125 and define all
known SPI and I2C Serial Engines.  On Sony Seine PDX201 all I2C buses
with known-connected hardware are enabled for future hardware mapping,
together with the respective GPI DMA 0 and QUP 0.

Changes since v1:
- Un-downstream pinctrl mapping:
  - Remove nested mux {} / config {};
  - Remove useless comments;
  - Remove unreferenced pinctrl states;
- Use qup14 pinctrl function name instead of unknown qup_14;
- Reword commit message;
- Add iommus to QUP nodes now that this series depends on apps_smmu to
  be available;
- Reorder all properties to match other SoCs;
- Reorder/intersperse QUP nodes with GPI DMA nodes to maintain sorting
  by address;
- Reorder SPI nodes to fit in with I2C nodes, restoring sorting by
  address too;
- Use QCOM_GPI_* constants;
- Adhere to 3 instead of 5 dma cells for gpi_dma.

v1: https://lore.kernel.org/all/20221001185628.494884-1-martin.botka@somainline.org/T/#u

Depends on:
- SM6125 APPS SMMU: https://lore.kernel.org/linux-arm-msm/20221216215819.1164973-1-marijn.suijten@somainline.org/T/#u
- SM6125 GPI DMA: https://lore.kernel.org/linux-arm-msm/20221216231528.1268447-1-marijn.suijten@somainline.org/T/#u

Marijn Suijten (2):
  arm64: dts: qcom: sm6125: Add QUPs with SPI and I2C Serial Engines
  arm64: dts: qcom: sm6125-seine: Enable GPI DMA 0, QUP 0 and I2C SEs

Martin Botka (1):
  arm64: dts: qcom: sm6125: Add pin configs for QUP SPI/I2C Serial
    Engines

 .../qcom/sm6125-sony-xperia-seine-pdx201.dts  |  29 +
 arch/arm64/boot/dts/qcom/sm6125.dtsi          | 522 ++++++++++++++++++
 2 files changed, 551 insertions(+)

--
2.39.0

Comments

Bjorn Andersson Dec. 29, 2022, 5:13 p.m. UTC | #1
On Sat, Dec 17, 2022 at 12:34:05AM +0100, Marijn Suijten wrote:
> Introduce Qualcomm Universal Peripheral support on SM6125 and define all
> known SPI and I2C Serial Engines.  On Sony Seine PDX201 all I2C buses
> with known-connected hardware are enabled for future hardware mapping,
> together with the respective GPI DMA 0 and QUP 0.
> 
> Changes since v1:
> - Un-downstream pinctrl mapping:
>   - Remove nested mux {} / config {};
>   - Remove useless comments;
>   - Remove unreferenced pinctrl states;
> - Use qup14 pinctrl function name instead of unknown qup_14;
> - Reword commit message;
> - Add iommus to QUP nodes now that this series depends on apps_smmu to
>   be available;
> - Reorder all properties to match other SoCs;
> - Reorder/intersperse QUP nodes with GPI DMA nodes to maintain sorting
>   by address;
> - Reorder SPI nodes to fit in with I2C nodes, restoring sorting by
>   address too;
> - Use QCOM_GPI_* constants;
> - Adhere to 3 instead of 5 dma cells for gpi_dma.
> 
> v1: https://lore.kernel.org/all/20221001185628.494884-1-martin.botka@somainline.org/T/#u
> 
> Depends on:
> - SM6125 APPS SMMU: https://lore.kernel.org/linux-arm-msm/20221216215819.1164973-1-marijn.suijten@somainline.org/T/#u
> - SM6125 GPI DMA: https://lore.kernel.org/linux-arm-msm/20221216231528.1268447-1-marijn.suijten@somainline.org/T/#u

Please, in the future, when you have dependencies between your dts
patches, send them together so I don't need to go on a treasure hunt in
my mailbox to figure out which order to apply things...

Regards,
Bjorn

> 
> Marijn Suijten (2):
>   arm64: dts: qcom: sm6125: Add QUPs with SPI and I2C Serial Engines
>   arm64: dts: qcom: sm6125-seine: Enable GPI DMA 0, QUP 0 and I2C SEs
> 
> Martin Botka (1):
>   arm64: dts: qcom: sm6125: Add pin configs for QUP SPI/I2C Serial
>     Engines
> 
>  .../qcom/sm6125-sony-xperia-seine-pdx201.dts  |  29 +
>  arch/arm64/boot/dts/qcom/sm6125.dtsi          | 522 ++++++++++++++++++
>  2 files changed, 551 insertions(+)
> 
> --
> 2.39.0
>
Marijn Suijten Dec. 29, 2022, 5:21 p.m. UTC | #2
On 2022-12-29 11:13:01, Bjorn Andersson wrote:
> On Sat, Dec 17, 2022 at 12:34:05AM +0100, Marijn Suijten wrote:
> > Introduce Qualcomm Universal Peripheral support on SM6125 and define all
> > known SPI and I2C Serial Engines.  On Sony Seine PDX201 all I2C buses
> > with known-connected hardware are enabled for future hardware mapping,
> > together with the respective GPI DMA 0 and QUP 0.
> > 
> > Changes since v1:
> > - Un-downstream pinctrl mapping:
> >   - Remove nested mux {} / config {};
> >   - Remove useless comments;
> >   - Remove unreferenced pinctrl states;
> > - Use qup14 pinctrl function name instead of unknown qup_14;
> > - Reword commit message;
> > - Add iommus to QUP nodes now that this series depends on apps_smmu to
> >   be available;
> > - Reorder all properties to match other SoCs;
> > - Reorder/intersperse QUP nodes with GPI DMA nodes to maintain sorting
> >   by address;
> > - Reorder SPI nodes to fit in with I2C nodes, restoring sorting by
> >   address too;
> > - Use QCOM_GPI_* constants;
> > - Adhere to 3 instead of 5 dma cells for gpi_dma.
> > 
> > v1: https://lore.kernel.org/all/20221001185628.494884-1-martin.botka@somainline.org/T/#u
> > 
> > Depends on:
> > - SM6125 APPS SMMU: https://lore.kernel.org/linux-arm-msm/20221216215819.1164973-1-marijn.suijten@somainline.org/T/#u
> > - SM6125 GPI DMA: https://lore.kernel.org/linux-arm-msm/20221216231528.1268447-1-marijn.suijten@somainline.org/T/#u
> 
> Please, in the future, when you have dependencies between your dts
> patches, send them together so I don't need to go on a treasure hunt in
> my mailbox to figure out which order to apply things...

I was quite confident separating out "unrelated" patches in separate
series was preferred, especially when dependencies are marked explicitly
like this... what changed?

(Aside that, would I then call this a v4+v2+v2?)

- Marijn
Bjorn Andersson Dec. 29, 2022, 5:23 p.m. UTC | #3
On Sat, 17 Dec 2022 00:34:05 +0100, Marijn Suijten wrote:
> Introduce Qualcomm Universal Peripheral support on SM6125 and define all
> known SPI and I2C Serial Engines.  On Sony Seine PDX201 all I2C buses
> with known-connected hardware are enabled for future hardware mapping,
> together with the respective GPI DMA 0 and QUP 0.
> 
> Changes since v1:
> - Un-downstream pinctrl mapping:
>   - Remove nested mux {} / config {};
>   - Remove useless comments;
>   - Remove unreferenced pinctrl states;
> - Use qup14 pinctrl function name instead of unknown qup_14;
> - Reword commit message;
> - Add iommus to QUP nodes now that this series depends on apps_smmu to
>   be available;
> - Reorder all properties to match other SoCs;
> - Reorder/intersperse QUP nodes with GPI DMA nodes to maintain sorting
>   by address;
> - Reorder SPI nodes to fit in with I2C nodes, restoring sorting by
>   address too;
> - Use QCOM_GPI_* constants;
> - Adhere to 3 instead of 5 dma cells for gpi_dma.
> 
> [...]

Applied, thanks!

[1/3] arm64: dts: qcom: sm6125: Add pin configs for QUP SPI/I2C Serial Engines
      commit: 075a6aef55919b9ed99cf07fe149aa52f80d9056
[2/3] arm64: dts: qcom: sm6125: Add QUPs with SPI and I2C Serial Engines
      commit: 72621d0443eaf4e70adcbcd801301b9dd6eed431
[3/3] arm64: dts: qcom: sm6125-seine: Enable GPI DMA 0, QUP 0 and I2C SEs
      commit: f3b770f7a8b439136c71c24dbfc408a0086c6326

Best regards,
Marijn Suijten Dec. 29, 2022, 5:25 p.m. UTC | #4
On 2022-12-29 18:21:55, Marijn Suijten wrote:
> On 2022-12-29 11:13:01, Bjorn Andersson wrote:
> > On Sat, Dec 17, 2022 at 12:34:05AM +0100, Marijn Suijten wrote:
> > > Introduce Qualcomm Universal Peripheral support on SM6125 and define all
> > > known SPI and I2C Serial Engines.  On Sony Seine PDX201 all I2C buses
> > > with known-connected hardware are enabled for future hardware mapping,
> > > together with the respective GPI DMA 0 and QUP 0.
> > > 
> > > Changes since v1:
> > > - Un-downstream pinctrl mapping:
> > >   - Remove nested mux {} / config {};
> > >   - Remove useless comments;
> > >   - Remove unreferenced pinctrl states;
> > > - Use qup14 pinctrl function name instead of unknown qup_14;
> > > - Reword commit message;
> > > - Add iommus to QUP nodes now that this series depends on apps_smmu to
> > >   be available;
> > > - Reorder all properties to match other SoCs;
> > > - Reorder/intersperse QUP nodes with GPI DMA nodes to maintain sorting
> > >   by address;
> > > - Reorder SPI nodes to fit in with I2C nodes, restoring sorting by
> > >   address too;
> > > - Use QCOM_GPI_* constants;
> > > - Adhere to 3 instead of 5 dma cells for gpi_dma.
> > > 
> > > v1: https://lore.kernel.org/all/20221001185628.494884-1-martin.botka@somainline.org/T/#u
> > > 
> > > Depends on:
> > > - SM6125 APPS SMMU: https://lore.kernel.org/linux-arm-msm/20221216215819.1164973-1-marijn.suijten@somainline.org/T/#u
> > > - SM6125 GPI DMA: https://lore.kernel.org/linux-arm-msm/20221216231528.1268447-1-marijn.suijten@somainline.org/T/#u
> > 
> > Please, in the future, when you have dependencies between your dts
> > patches, send them together so I don't need to go on a treasure hunt in
> > my mailbox to figure out which order to apply things...
> 
> I was quite confident separating out "unrelated" patches in separate
> series was preferred, especially when dependencies are marked explicitly
> like this... what changed?

Perhaps because both dependencies have been resent, and the links for
APPS SMMU v4 and GPI DMA v2 have become obsolete in favour of:

- SM6125 APPS SMMU v5: https://lore.kernel.org/linux-arm-msm/20221222193254.126925-1-marijn.suijten@somainline.org/T/#u
- SM6125 GPI DMA v3: https://lore.kernel.org/linux-arm-msm/20221222194600.139854-1-marijn.suijten@somainline.org/T/#u

- Marijn