Message ID | 20230509161218.11979-1-quic_jkona@quicinc.com |
---|---|
Headers | show |
Series | Add Video Clock Controller driver for SM8550 | expand |
On 09/05/2023 18:12, Jagadeesh Kona wrote: > Add device tree bindings for the video clock controller on Qualcomm > SM8550 platform. > > Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> > Signed-off-by: Taniya Das <quic_tdas@quicinc.com> > --- > .../bindings/clock/qcom,sm8550-videocc.yaml | 77 +++++++++++++++++++ > .../dt-bindings/clock/qcom,sm8550-videocc.h | 38 +++++++++ > 2 files changed, 115 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8550-videocc.yaml > create mode 100644 include/dt-bindings/clock/qcom,sm8550-videocc.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-videocc.yaml > new file mode 100644 > index 000000000000..107af5e9af89 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-videocc.yaml > @@ -0,0 +1,77 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,sm8550-videocc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Video Clock & Reset Controller on SM8550 > + > +maintainers: > + - Jagadeesh Kona <quic_jkona@quicinc.com> > + - Taniya Das <quic_tdas@quicinc.com> > + > +description: | > + Qualcomm video clock control module provides the clocks, resets and power > + domains on SM8550. > + > + See also:: include/dt-bindings/clock/qcom,videocc-sm8550.h > + > +properties: > + compatible: > + const: qcom,sm8550-videocc Nope, looks 100% the same as sm8450, put it there. https://lore.kernel.org/all/20230509172148.7627-2-quic_tdas@quicinc.com/ Best regards, Krzysztof