| Message ID | 20230808190144.19999-1-brgl@bgdev.pl |
|---|---|
| Headers | show |
| Series | arm64: dts: qcom: enable EMAC1 on sa8775p | expand |
On 8.08.2023 21:01, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > Add a node for the second MAC on sa8775p platforms. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > Reviewed-by: Andrew Halaney <ahalaney@redhat.com> > --- > arch/arm64/boot/dts/qcom/sa8775p.dtsi | 34 +++++++++++++++++++++++++++ > 1 file changed, 34 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > index 38d10af37ab0..82af2e6cbda4 100644 > --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi > +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > @@ -2325,6 +2325,40 @@ cpufreq_hw: cpufreq@18591000 { > #freq-domain-cells = <1>; > }; > > + ethernet1: ethernet@23000000 { > + compatible = "qcom,sa8775p-ethqos"; > + reg = <0x0 0x23000000 0x0 0x10000>, > + <0x0 0x23016000 0x0 0x100>; > + reg-names = "stmmaceth", "rgmii"; > + > + interrupts = <GIC_SPI 929 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "macirq"; > + > + clocks = <&gcc GCC_EMAC1_AXI_CLK>, > + <&gcc GCC_EMAC1_SLV_AHB_CLK>, > + <&gcc GCC_EMAC1_PTP_CLK>, > + <&gcc GCC_EMAC1_PHY_AUX_CLK>; > + > + clock-names = "stmmaceth", > + "pclk", > + "ptp_ref", > + "phyaux"; This is a very nitty nit, but if there's going to be a v3, please remove the newline between clocks and clock-names Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> This series contains changes required to enable EMAC1 on sa8775p-ride. This iteration no longer depends on any changes to the stmmac driver to be functional. It turns out I was mistaken in thinking that the two MACs' MDIO masters share the MDIO clock and data lines. In reality, only one MAC is connected to an MDIO bus and it controlls PHYs for both MAC0 and MAC1. The MDIO master on MAC1 is not connected to anything. v1 -> v2: - remove pin functions for MDIO signals and don't assign them to MAC1 - add a delay after asserting the PHY's reset signal, not only when it's released - remove the entire concept of shared-mdio property - add aliases for ethernet nodes in order to avoid MDIO bus name conflicts in stmmac Bartosz Golaszewski (8): arm64: dts: qcom: sa8775p: add a node for the second serdes PHY arm64: dts: qcom: sa8775p: add a node for EMAC1 arm64: dts: qcom: sa8775p-ride: enable the second SerDes PHY arm64: dts: qcom: sa8775p-ride: move the reset-gpios property of the PHY arm64: dts: qcom: sa8775p-ride: index the first SGMII PHY arm64: dts: qcom: sa8775p-ride: add the second SGMII PHY arm64: dts: qcom: sa8775p-ride: add an alias for ethernet0 arm64: dts: qcom: sa8775p-ride: enable EMAC1 arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 98 +++++++++++++++++++++-- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 43 ++++++++++ 2 files changed, 135 insertions(+), 6 deletions(-)