[v5,0/6] cpufreq: qcom-nvmem: support apq8064 cpufreq scaling

This is a split of APQ8064 cpufreq series, as requested by Viresh. This
series includes only opp and cpufreq parts, with the DT and soc parts
being split to a separate patchset.

Each core has independent power and frequency control. Additionally the
L2 cache is scaled to follow the CPU frequencies (failure to do so
results in strange semi-random crashes).

Core voltage is controlled through the SAW2 devices, one for each core.
The L2 has two regulators, vdd-mem and vdd-dig.

Changes since v4:
- Reordered variables in qcom_cpufreq_init() (Konrad)
- Fixed of_platform_device_create() error check (Konrad)
- Dropped unused ret variable in qcom_cpufreq_apq8064_name_version() (Konrad)

Changes since v3:
- Split the series (Viresh)
- Unrolled loops in krait_l2_config_regulators() (Konrad)

Dmitry Baryshkov (6):
  dt-bindings: opp: opp-v2-kryo-cpu: support Qualcomm Krait SoCs
  cpufreq: qcom-nvmem: create L2 cache device
  cpufreq: qcom-nvmem: also accept operating-points-v2-krait-cpu
  cpufreq: qcom-nvmem: drop pvs_ver for format a fuses
  cpufreq: qcom-nvmem: provide separate configuration data for apq8064
  cpufreq: qcom-nvmem: enable core voltage scaling for MSM8960

 .../bindings/opp/opp-v2-kryo-cpu.yaml         | 12 ++-
 drivers/cpufreq/qcom-cpufreq-nvmem.c          | 80 +++++++++++++++++--
 2 files changed, 81 insertions(+), 11 deletions(-)

On 02-10-23, 21:59, Dmitry Baryshkov wrote:
> This is a split of APQ8064 cpufreq series, as requested by Viresh. This
> series includes only opp and cpufreq parts, with the DT and soc parts
> being split to a separate patchset.
> 
> Each core has independent power and frequency control. Additionally the
> L2 cache is scaled to follow the CPU frequencies (failure to do so
> results in strange semi-random crashes).
> 
> Core voltage is controlled through the SAW2 devices, one for each core.
> The L2 has two regulators, vdd-mem and vdd-dig.
> 
> Changes since v4:
> - Reordered variables in qcom_cpufreq_init() (Konrad)
> - Fixed of_platform_device_create() error check (Konrad)
> - Dropped unused ret variable in qcom_cpufreq_apq8064_name_version() (Konrad)

Applied. Thanks.

On Thu, Oct 12, 2023 at 09:12:41AM +0530, Viresh Kumar wrote:
> On 10-10-23, 12:02, Viresh Kumar wrote:
> > On 02-10-23, 21:59, Dmitry Baryshkov wrote:
> > > This is a split of APQ8064 cpufreq series, as requested by Viresh. This
> > > series includes only opp and cpufreq parts, with the DT and soc parts
> > > being split to a separate patchset.
> > > 
> > > Each core has independent power and frequency control. Additionally the
> > > L2 cache is scaled to follow the CPU frequencies (failure to do so
> > > results in strange semi-random crashes).
> > > 
> > > Core voltage is controlled through the SAW2 devices, one for each core.
> > > The L2 has two regulators, vdd-mem and vdd-dig.
> > > 
> > > Changes since v4:
> > > - Reordered variables in qcom_cpufreq_init() (Konrad)
> > > - Fixed of_platform_device_create() error check (Konrad)
> > > - Dropped unused ret variable in qcom_cpufreq_apq8064_name_version() (Konrad)
> > 
> > Applied. Thanks.
> 
> Since these are causing build issues, and it isn't entirely clear what's the
> right approach for now, I have dropped the changes from my branch to avoid any
> further issues. You don't need to resend these, lets finalize a solution and
> then I can apply them again.
> 

Hi we have a qcom-cpufreq series that depends on this (or better say we
have rebased it on top of these changes to prevent merge conflicts)

Can you link where this was applied, also can I help in fixing the
compile error to speed things up?

On 12-10-23, 10:40, Christian Marangi wrote:
> On Thu, Oct 12, 2023 at 09:12:41AM +0530, Viresh Kumar wrote:
> > On 10-10-23, 12:02, Viresh Kumar wrote:
> > > On 02-10-23, 21:59, Dmitry Baryshkov wrote:
> > > > This is a split of APQ8064 cpufreq series, as requested by Viresh. This
> > > > series includes only opp and cpufreq parts, with the DT and soc parts
> > > > being split to a separate patchset.
> > > > 
> > > > Each core has independent power and frequency control. Additionally the
> > > > L2 cache is scaled to follow the CPU frequencies (failure to do so
> > > > results in strange semi-random crashes).
> > > > 
> > > > Core voltage is controlled through the SAW2 devices, one for each core.
> > > > The L2 has two regulators, vdd-mem and vdd-dig.
> > > > 
> > > > Changes since v4:
> > > > - Reordered variables in qcom_cpufreq_init() (Konrad)
> > > > - Fixed of_platform_device_create() error check (Konrad)
> > > > - Dropped unused ret variable in qcom_cpufreq_apq8064_name_version() (Konrad)
> > > 
> > > Applied. Thanks.
> > 
> > Since these are causing build issues, and it isn't entirely clear what's the
> > right approach for now, I have dropped the changes from my branch to avoid any
> > further issues. You don't need to resend these, lets finalize a solution and
> > then I can apply them again.
> > 
> 
> Hi we have a qcom-cpufreq series that depends on this (or better say we
> have rebased it on top of these changes to prevent merge conflicts)

That shouldn't be an issue I guess, we are likely not going to change anything
in these patches but something else:

https://lore.kernel.org/all/20231011112726.166052-1-dmitry.baryshkov@linaro.org/

> Can you link where this was applied, also can I help in fixing the
> compile error to speed things up?

I applied them here earlier.

git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm.git opp/linux-next