Message ID | 20231213-encoder-fixup-v4-0-6da6cd1bf118@quicinc.com |
---|---|
Headers | show |
Series | drm/msm/dpu: INTF CRC configuration cleanups and fix | expand |
On 12/13/2023 1:30 PM, Jessica Zhang wrote: > Set the input_sel bit for encoders as it was missed in the initial > implementation. > > Reported-by: Rob Clark <robdclark@gmail.com> > Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/39 > Fixes: 91143873a05d ("drm/msm/dpu: Add MISR register support for interface") > Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 2 +- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 2 +- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c | 9 +++++++-- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h | 3 ++- > 4 files changed, 11 insertions(+), 5 deletions(-) > Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>