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[v2,0/4] dt-bindings: arm: qcom: Add compatible for QCS8300 SoC

Message ID 20240911-qcs8300_binding-v2-0-de8641b3eaa1@quicinc.com
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Series dt-bindings: arm: qcom: Add compatible for QCS8300 SoC | expand

Message

Jingyi Wang Sept. 11, 2024, 8:03 a.m. UTC 
Add compitible for Qualcomm QCS8300 Platform including pdc, scm, imem and
aoss-qmp.

Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
---
Changes in v2:
- decoupled from the original series.
- Link to v1: https://lore.kernel.org/r/20240904-qcs8300_initial_dtsi-v1-0-d0ea9afdc007@quicinc.com

---
Jingyi Wang (2):
      dt-bindings: qcom,pdc: document QCS8300 Power Domain Controller
      dt-bindings: soc: qcom: add qcom,qcs8300-imem compatible

Kyle Deng (1):
      dt-bindings: soc: qcom,aoss-qmp: Document the QCS8300 AOSS channel

Zhenhua Huang (1):
      dt-bindings: firmware: qcom,scm: document SCM on QCS8300 SoCs

 Documentation/devicetree/bindings/firmware/qcom,scm.yaml             | 1 +
 Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml | 1 +
 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml        | 1 +
 Documentation/devicetree/bindings/sram/qcom,imem.yaml                | 1 +
 4 files changed, 4 insertions(+)
---
base-commit: 100cc857359b5d731407d1038f7e76cd0e871d94
change-id: 20240911-qcs8300_binding-6e7bb1d1d670

Best regards,

Comments

Krzysztof Kozlowski Sept. 16, 2024, 3:10 p.m. UTC | #1 
On Wed, Sep 11, 2024 at 04:03:15PM +0800, Jingyi Wang wrote:
> Document Power Domain Controller for Qualcomm QCS8300. PDC is included
> in QCS8300 SoC. This controller acts as an interrupt controller, enabling
> the detection of interrupts when the GIC is non-operational.
> 
> Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
> ---
>  Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml | 1 +
>  1 file changed, 1 insertion(+)

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof
Krzysztof Kozlowski Sept. 16, 2024, 3:11 p.m. UTC | #2 
On Wed, Sep 11, 2024 at 04:03:18PM +0800, Jingyi Wang wrote:
> From: Kyle Deng <quic_chunkaid@quicinc.com>
> 
> Document the Always-On Subsystem side channel on the Qualcomm QCS8300
> platform for communication with client found on the SoC such as
> remoteprocs.
> 
> Signed-off-by: Kyle Deng <quic_chunkaid@quicinc.com>
> Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
> ---
>  Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml | 1 +
>  1 file changed, 1 insertion(+)

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof
Rob Herring (Arm) Jan. 6, 2025, 7:08 p.m. UTC | #3 
On Wed, Sep 11, 2024 at 04:03:15PM +0800, Jingyi Wang wrote:
> Document Power Domain Controller for Qualcomm QCS8300. PDC is included
> in QCS8300 SoC. This controller acts as an interrupt controller, enabling
> the detection of interrupts when the GIC is non-operational.
> 
> Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
> ---
>  Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml | 1 +
>  1 file changed, 1 insertion(+)

Applied, thanks.

Rob