mbox series

[0/2] arm64: qcom: Add BWMON support for QCS615

Message ID 20241218-add_bwmon_support_for_qcs615-v1-0-680d798a19e5@quicinc.com
Headers show
Series arm64: qcom: Add BWMON support for QCS615 | expand

Message

Lijuan Gao Dec. 18, 2024, 10:39 a.m. UTC
Document and add CPU and LLCC BWMON nodes and their corresponding OPP
tables for QCS615 SoC.

The patch has undergone the following verifications:
- Successfully passed dt_binding_check with DT_CHECKER_FLAGS=-m for binding
  file
- Successfully passed dtbs_check with W=1 for dts
- Verified each item in the CPU and LLCC OPP tables, and the BCM threshold
  and clock values meet expectations.

Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
---
Lijuan Gao (2):
      dt-bindings: interconnect: qcom-bwmon: Document QCS615 bwmon compatibles
      arm64: dts: qcom: qcs615: Add CPU and LLCC BWMON support

 .../bindings/interconnect/qcom,msm8998-bwmon.yaml  |  2 +
 arch/arm64/boot/dts/qcom/qcs615.dtsi               | 72 ++++++++++++++++++++++
 2 files changed, 74 insertions(+)
---
base-commit: fdb298fa865b0136f7be842e6c2e6310dede421a
change-id: 20241217-add_bwmon_support_for_qcs615-a8c7a4034379

Best regards,

Comments

Krzysztof Kozlowski Dec. 19, 2024, 9:19 a.m. UTC | #1
On Wed, Dec 18, 2024 at 06:39:38PM +0800, Lijuan Gao wrote:
> Document QCS615 BWMONs, which includes one BWMONv4 instance for CPU to
> LLCC path bandwidth monitoring and one BWMONv5 instance for LLCC to DDR
> path bandwidth monitoring.
> 
> Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
> ---
>  Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml | 2 ++
>  1 file changed, 2 insertions(+)

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof