Message ID | 20250313080600.1719505-1-quic_varada@quicinc.com |
---|---|
Headers | show |
Series | Add PCIe support for Qualcomm IPQ5332 | expand |
On 13/03/2025 09:05, Varadarajan Narayanan wrote:
> Append the MHI register range to IPQ9574. This is an optional range used
Same question, you still did not answer - does hardware have this range?
Which hardware has it?
I pointed out that you affect at least two other variants. Your commit
msg must explain that. For example what if they do not have this range?
Then this change is just wrong.
Start documenting the hardware, not your drivers.
Best regards,
Krzysztof
On Thu, Mar 13, 2025 at 12:01:54PM +0100, Krzysztof Kozlowski wrote: > On 13/03/2025 09:05, Varadarajan Narayanan wrote: > > Append the MHI register range to IPQ9574. This is an optional range used > > Same question, you still did not answer - does hardware have this range? > Which hardware has it? Yes. All three (ipq6018, ipq8074, ipq9574) have this range. > I pointed out that you affect at least two other variants. Your commit > msg must explain that. For example what if they do not have this range? > Then this change is just wrong. > > Start documenting the hardware, not your drivers. Since all three have this range will this commit message be ok? Append the MHI register range to ipq6018, ipq8074-gen3 & ipq9574. This is an optional range used by the dwc controller driver to print debug stats via the debugfs file 'link_transition_count'. Additionally, should I update ipq6018.dtsi and ipq8074.dtsi also and include in this patchset? Thanks Varada