Message ID | cover.1606287059.git.saiprakash.ranjan@codeaurora.org |
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Headers | show
Return-Path: <linux-arm-msm-owner@kernel.org> X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F30D9C64E7C for <linux-arm-msm@archiver.kernel.org>; Wed, 25 Nov 2020 07:01:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9ADD920B1F for <linux-arm-msm@archiver.kernel.org>; Wed, 25 Nov 2020 07:01:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="pEE7qJTL" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726689AbgKYHB1 (ORCPT <rfc822;linux-arm-msm@archiver.kernel.org>); Wed, 25 Nov 2020 02:01:27 -0500 Received: from z5.mailgun.us ([104.130.96.5]:13443 "EHLO z5.mailgun.us" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727004AbgKYHB1 (ORCPT <rfc822;linux-arm-msm@vger.kernel.org>); Wed, 25 Nov 2020 02:01:27 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1606287686; h=Content-Transfer-Encoding: MIME-Version: Message-Id: Date: Subject: Cc: To: From: Sender; bh=xdFWt8SW+lBVcOVDV7RfrFuOTXrgStdWcZ71nFKgFVc=; b=pEE7qJTLRHubIPveiiA6/cTyWsPvEZO6DQXdxfGBY5MhvemrCIiwXS6It67XXle6g/VoNEEw hRg2MA19Kye2NCL+1innji6R18+CHkuA7tQ63Itqo7bhw8SJ0r+Wf1YFiyyVcyMA6L98GYih 9N+rhboteK3SQeyOun8VnGIUPB4= X-Mailgun-Sending-Ip: 104.130.96.5 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n07.prod.us-east-1.postgun.com with SMTP id 5fbe01111b731a5d9ccfae56 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Wed, 25 Nov 2020 07:00:33 GMT Sender: saiprakash.ranjan=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 544A8C43464; Wed, 25 Nov 2020 07:00:32 +0000 (UTC) Received: from blr-ubuntu-253.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id DAFFEC433ED; Wed, 25 Nov 2020 07:00:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org DAFFEC433ED Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=saiprakash.ranjan@codeaurora.org From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> To: Will Deacon <will@kernel.org>, Robin Murphy <robin.murphy@arm.com>, Joerg Roedel <joro@8bytes.org>, Jordan Crouse <jcrouse@codeaurora.org>, Rob Clark <robdclark@gmail.com> Cc: Akhil P Oommen <akhilpo@codeaurora.org>, freedreno@lists.freedesktop.org, Kristian H Kristensen <hoegsberg@google.com>, dri-devel@lists.freedesktop.org, iommu@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Subject: [PATCHv10 0/9] System Cache support for GPU and required SMMU support Date: Wed, 25 Nov 2020 12:30:09 +0530 Message-Id: <cover.1606287059.git.saiprakash.ranjan@codeaurora.org> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: <linux-arm-msm.vger.kernel.org> X-Mailing-List: linux-arm-msm@vger.kernel.org |
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System Cache support for GPU and required SMMU support
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