From patchwork Fri Oct 24 23:40:23 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lina Iyer X-Patchwork-Id: 39505 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-la0-f72.google.com (mail-la0-f72.google.com [209.85.215.72]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 7F96420341 for ; Fri, 24 Oct 2014 23:41:17 +0000 (UTC) Received: by mail-la0-f72.google.com with SMTP id gq15sf2335839lab.7 for ; Fri, 24 Oct 2014 16:41:16 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=1yJxEH18mzCcIuW5SzKhP05E+FW4W4VS5imk45GOlWc=; b=BdNJ9MSvYUtFaWbrHIvvGink6vldxNj4ozlV/3eLrug6tGASFnFocmzljjWfNkT4ab MIabAX3E1XzqiqFO/ydKQYeJ0S+83zp/oT2jFfQtfHp0BoW3NH5H4uIGsoBXRnIQVGtC ZMhm2wsNfcansA8AomcyUK/XD91dS4z76TpEBcDA3WfPaC8ag3oEnxniMXuiGh+g1HxL e6VA44cKcaZcH7wtHyzp+tNgwUR5YQ37fD30MR6H+jqUp2XvxWV0Y7BDU14a7pOe2v9C 8XLM9RzUD/0Xl8aXE8aZQxv2re29pWzO66w+gMRG9rj10tTgrqlAh/6wrA57DaoHvM0e 5qKg== X-Gm-Message-State: ALoCoQlcKSyOp0G2oEgyhYrdm+QQbUuj15GEBQiQIKknGu2jy7uJyuLdHIEXNM2oYGS+ajJLz674 X-Received: by 10.180.186.142 with SMTP id fk14mr1373397wic.4.1414194076367; Fri, 24 Oct 2014 16:41:16 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.153.6.38 with SMTP id cr6ls223250lad.108.gmail; Fri, 24 Oct 2014 16:41:16 -0700 (PDT) X-Received: by 10.152.121.68 with SMTP id li4mr7341998lab.77.1414194076171; Fri, 24 Oct 2014 16:41:16 -0700 (PDT) Received: from mail-la0-f41.google.com (mail-la0-f41.google.com. [209.85.215.41]) by mx.google.com with ESMTPS id j5si9017122lam.25.2014.10.24.16.41.15 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 24 Oct 2014 16:41:15 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.41 as permitted sender) client-ip=209.85.215.41; Received: by mail-la0-f41.google.com with SMTP id pn19so3686722lab.0 for ; Fri, 24 Oct 2014 16:41:15 -0700 (PDT) X-Received: by 10.152.87.7 with SMTP id t7mr7641765laz.74.1414194075864; Fri, 24 Oct 2014 16:41:15 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.84.229 with SMTP id c5csp518993lbz; Fri, 24 Oct 2014 16:41:14 -0700 (PDT) X-Received: by 10.70.88.174 with SMTP id bh14mr8037113pdb.24.1414194067293; Fri, 24 Oct 2014 16:41:07 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id pw4si5282886pbb.98.2014.10.24.16.41.06 for ; Fri, 24 Oct 2014 16:41:07 -0700 (PDT) Received-SPF: none (google.com: linux-arm-msm-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933063AbaJXXlE (ORCPT + 5 others); Fri, 24 Oct 2014 19:41:04 -0400 Received: from mail-pd0-f181.google.com ([209.85.192.181]:52274 "EHLO mail-pd0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932965AbaJXXlB (ORCPT ); Fri, 24 Oct 2014 19:41:01 -0400 Received: by mail-pd0-f181.google.com with SMTP id w10so2239200pde.26 for ; Fri, 24 Oct 2014 16:41:01 -0700 (PDT) X-Received: by 10.68.137.101 with SMTP id qh5mr1219860pbb.13.1414194061395; Fri, 24 Oct 2014 16:41:01 -0700 (PDT) Received: from ubuntu.localdomain (proxy6-global253.qualcomm.com. [199.106.103.253]) by mx.google.com with ESMTPSA id fm15sm4774620pdb.58.2014.10.24.16.40.59 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 24 Oct 2014 16:41:00 -0700 (PDT) From: Lina Iyer To: daniel.lezcano@linaro.org, khilman@linaro.org, sboyd@codeaurora.org, galak@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: lorenzo.pieralisi@arm.com, msivasub@codeaurora.org, devicetree@vger.kernel.org, Lina Iyer Subject: [PATCH v9 8/9] arm: dts: qcom: Add idle states device nodes for 8084 Date: Fri, 24 Oct 2014 17:40:23 -0600 Message-Id: <1414194024-55547-9-git-send-email-lina.iyer@linaro.org> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1414194024-55547-1-git-send-email-lina.iyer@linaro.org> References: <1414194024-55547-1-git-send-email-lina.iyer@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lina.iyer@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.41 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add allowable C-States for each cpu using the cpu-idle-states node. Support standby and standalone power collapse (power down that does not affect any SoC idle states) for each cpu. Signed-off-by: Lina Iyer --- arch/arm/boot/dts/qcom-apq8084.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index 4466b9e..207be15 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -22,6 +22,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc0>; qcom,saw = <&saw0>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; cpu@1 { @@ -32,6 +33,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc1>; qcom,saw = <&saw1>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; cpu@2 { @@ -42,6 +44,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc2>; qcom,saw = <&saw2>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; cpu@3 { @@ -52,6 +55,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc3>; qcom,saw = <&saw3>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; L2: l2-cache { @@ -59,6 +63,22 @@ cache-level = <2>; qcom,saw = <&saw_l2>; }; + + idle-states { + CPU_STBY: standby { + compatible = "qcom,idle-state-stby", "arm,idle-state"; + entry-latency-us = <1>; + exit-latency-us = <1>; + min-residency-us = <2>; + }; + + CPU_SPC: spc { + compatible = "qcom,idle-state-spc", "arm,idle-state"; + entry-latency-us = <150>; + exit-latency-us = <200>; + min-residency-us = <2000>; + }; + }; }; cpu-pmu {