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[23.128.96.18]) by mx.google.com with ESMTP id j14si10062778ejy.327.2020.12.14.06.19.58; Mon, 14 Dec 2020 06:19:58 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="LLyq/tTZ"; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2440033AbgLNOT4 (ORCPT + 15 others); Mon, 14 Dec 2020 09:19:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43498 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2440035AbgLNOTy (ORCPT ); Mon, 14 Dec 2020 09:19:54 -0500 Received: from mail-wm1-x344.google.com (mail-wm1-x344.google.com [IPv6:2a00:1450:4864:20::344]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 470FCC0617B0 for ; Mon, 14 Dec 2020 06:18:38 -0800 (PST) Received: by mail-wm1-x344.google.com with SMTP id x22so13851989wmc.5 for ; Mon, 14 Dec 2020 06:18:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lvOycJjcphK1qnN/wDZnGvr18L32M/Z73HhDCdQdbTk=; b=LLyq/tTZ5WYizgf0bBbvJTuUWnNy4pixiaSXDT4Oefs0VWi+a2aHDuRiy2baa3F5Jj 4AS8y7Zfc6QTHkcTlQmOzPaX4GHfkcMHsMsmmoQyX2RmTAAY+Nvri9gX9lX/KRmAeRMA d0UONVbGBEUp+Bu47pgOixfZ7XzHPk3Jr5fAgZJ3UZsbZARgxnqzjBsFxquOZkMVoRxX 6ChyBjEcOi9PD+eqn6YGRbDGG/Zkyg0CL7GpK8j6Jm/QjHF4O2dILMeANzsikSio0FhO EZxzx2WnWCZjYRCc+gdzKyrP7vL5GQ++KgLOntkPKNOug78S903tcR9hUunebnWxSEKJ kS6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lvOycJjcphK1qnN/wDZnGvr18L32M/Z73HhDCdQdbTk=; b=UmPyYTV87dYhuQ5eWRSc22ZI7t1C8pcpQZH6vDsxEafAHcOokMFhXl+zEqusxwn2hb w1IMG4bUZL4/LvITeqMZxAAIvivros8+RAahWeCN9xJJ3fNsW90FWAnWlK3XscI6jUq6 Wa2bD0uh9uI4mEVUwtJZZL2r6bsRDcChTEJJQcivDOdaiFcAuQT6H2/er1LFMBrEdjsz 3UrcXcW9jQVMKHWTyNz+wS2zT7/L2wz/5oL/tC76GA0BrtOyAKc5j40GNfTg+LSabB/T PkpZaBrvgjqRnRZeH2iusjr9z9gxKV/oC0EhrwIF1WF7IqW39xxemaIQ475BhHim2Los bPbA== X-Gm-Message-State: AOAM530oZhsZZvqygPwY9j/fhPz8JVQUKZNngsSUn8zQOi9gAoB56GdM CpMg4ViWreUnUHKUjWUUEKnK7VDtl71xYA== X-Received: by 2002:a1c:55ca:: with SMTP id j193mr28353653wmb.87.1607955517017; Mon, 14 Dec 2020 06:18:37 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:f2e4:25b3:2b53:52cd]) by smtp.gmail.com with ESMTPSA id h5sm34126285wrp.56.2020.12.14.06.18.36 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 14 Dec 2020 06:18:36 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, bbhatt@codeaurora.org, Loic Poulain Subject: [PATCH v5 08/10] mhi: pci_generic: Add health-check Date: Mon, 14 Dec 2020 15:25:35 +0100 Message-Id: <1607955937-26951-9-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> References: <1607955937-26951-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org If the modem crashes for any reason, we may not be able to detect it at MHI level (MHI registers not reachable anymore). This patch implements a health-check mechanism to check regularly that device is alive (MHI layer can communicate with). If device is not alive (because a crash or unexpected reset), the recovery procedure is triggered. Tested successfully with Telit FN980m module. Signed-off-by: Loic Poulain Reviewed-by: Manivannan Sadhasivam Reviewed-by: Hemant Kumar --- drivers/bus/mhi/pci_generic.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index b4a68bd..063a287 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -14,11 +14,15 @@ #include #include #include +#include #include #define MHI_PCI_DEFAULT_BAR_NUM 0 #define MHI_POST_RESET_DELAY_MS 500 + +#define HEALTH_CHECK_PERIOD (HZ * 2) + /** * struct mhi_pci_dev_info - MHI PCI device specific information * @config: MHI controller configuration @@ -189,6 +193,7 @@ struct mhi_pci_device { struct mhi_controller mhi_cntrl; struct pci_saved_state *pci_state; struct work_struct recovery_work; + struct timer_list health_check_timer; unsigned long status; }; @@ -326,6 +331,8 @@ static void mhi_pci_recovery_work(struct work_struct *work) dev_warn(&pdev->dev, "device recovery started\n"); + del_timer(&mhi_pdev->health_check_timer); + /* Clean up MHI state */ if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { mhi_power_down(mhi_cntrl, false); @@ -349,6 +356,7 @@ static void mhi_pci_recovery_work(struct work_struct *work) goto err_unprepare; set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); return; err_unprepare: @@ -358,6 +366,21 @@ static void mhi_pci_recovery_work(struct work_struct *work) dev_err(&pdev->dev, "Recovery failed\n"); } +static void health_check(struct timer_list *t) +{ + struct mhi_pci_device *mhi_pdev = from_timer(mhi_pdev, t, health_check_timer); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + + if (!mhi_pci_is_alive(mhi_cntrl)) { + dev_err(mhi_cntrl->cntrl_dev, "Device died\n"); + queue_work(system_long_wq, &mhi_pdev->recovery_work); + return; + } + + /* reschedule in two seconds */ + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); +} + static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { const struct mhi_pci_dev_info *info = (struct mhi_pci_dev_info *) id->driver_data; @@ -373,6 +396,7 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) return -ENOMEM; INIT_WORK(&mhi_pdev->recovery_work, mhi_pci_recovery_work); + timer_setup(&mhi_pdev->health_check_timer, health_check, 0); mhi_cntrl_config = info->config; mhi_cntrl = &mhi_pdev->mhi_cntrl; @@ -425,6 +449,9 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + /* start health check */ + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); + return 0; err_unprepare: @@ -440,6 +467,7 @@ static void mhi_pci_remove(struct pci_dev *pdev) struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + del_timer(&mhi_pdev->health_check_timer); cancel_work_sync(&mhi_pdev->recovery_work); if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { @@ -457,6 +485,8 @@ static void mhi_pci_reset_prepare(struct pci_dev *pdev) dev_info(&pdev->dev, "reset\n"); + del_timer(&mhi_pdev->health_check_timer); + /* Clean up MHI state */ if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { mhi_power_down(mhi_cntrl, false); @@ -500,6 +530,7 @@ static void mhi_pci_reset_done(struct pci_dev *pdev) } set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); } static pci_ers_result_t mhi_pci_error_detected(struct pci_dev *pdev, @@ -560,6 +591,7 @@ static int __maybe_unused mhi_pci_suspend(struct device *dev) struct mhi_pci_device *mhi_pdev = dev_get_drvdata(dev); struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + del_timer(&mhi_pdev->health_check_timer); cancel_work_sync(&mhi_pdev->recovery_work); /* Transition to M3 state */ @@ -595,6 +627,9 @@ static int __maybe_unused mhi_pci_resume(struct device *dev) goto err_recovery; } + /* Resume health check */ + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); + return 0; err_recovery: