diff mbox series

[v3,3/6] mhi: pci_generic: Add SDX24 based modem support

Message ID 1614971808-22156-3-git-send-email-loic.poulain@linaro.org
State Accepted
Commit 59d05b71729b96d809b89e70640b9332d559b20f
Headers show
Series [v3,1/6] mhi: pci_generic: Parametrable element count for events | expand

Commit Message

Loic Poulain March 5, 2021, 7:16 p.m. UTC 
Add generic info for SDX24 based modems. Also add the FIREHOSE channels
used by the flash-programmer firmware loaded in EDL mode.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

---
 v2: no change
 v3: no change

 drivers/bus/mhi/pci_generic.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

-- 
2.7.4

Comments

Manivannan Sadhasivam March 10, 2021, 1:35 p.m. UTC | #1 
On Fri, Mar 05, 2021 at 08:16:45PM +0100, Loic Poulain wrote:
> Add generic info for SDX24 based modems. Also add the FIREHOSE channels

> used by the flash-programmer firmware loaded in EDL mode.

> 

> Signed-off-by: Loic Poulain <loic.poulain@linaro.org>

> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>


Applied to mhi-next!

Thanks,
Mani

> ---

>  v2: no change

>  v3: no change

> 

>  drivers/bus/mhi/pci_generic.c | 10 ++++++++++

>  1 file changed, 10 insertions(+)

> 

> diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c

> index 45d0cf2..c274e65 100644

> --- a/drivers/bus/mhi/pci_generic.c

> +++ b/drivers/bus/mhi/pci_generic.c

> @@ -212,6 +212,14 @@ static const struct mhi_pci_dev_info mhi_qcom_sdx55_info = {

>  	.dma_data_width = 32

>  };

>  

> +static const struct mhi_pci_dev_info mhi_qcom_sdx24_info = {

> +	.name = "qcom-sdx24",

> +	.edl = "qcom/prog_firehose_sdx24.mbn",

> +	.config = &modem_qcom_v1_mhiv_config,

> +	.bar_num = MHI_PCI_DEFAULT_BAR_NUM,

> +	.dma_data_width = 32

> +};

> +

>  static const struct mhi_channel_config mhi_quectel_em1xx_channels[] = {

>  	MHI_CHANNEL_CONFIG_UL(0, "NMEA", 32, 0),

>  	MHI_CHANNEL_CONFIG_DL(1, "NMEA", 32, 0),

> @@ -254,6 +262,8 @@ static const struct mhi_pci_dev_info mhi_quectel_em1xx_info = {

>  static const struct pci_device_id mhi_pci_id_table[] = {

>  	{ PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0306),

>  		.driver_data = (kernel_ulong_t) &mhi_qcom_sdx55_info },

> +	{ PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0304),

> +		.driver_data = (kernel_ulong_t) &mhi_qcom_sdx24_info },

>  	{ PCI_DEVICE(0x1eac, 0x1001), /* EM120R-GL (sdx24) */

>  		.driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info },

>  	{ PCI_DEVICE(0x1eac, 0x1002), /* EM160R-GL (sdx24) */

> -- 

> 2.7.4

>
diff mbox series

Patch

diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c
index 45d0cf2..c274e65 100644
--- a/drivers/bus/mhi/pci_generic.c
+++ b/drivers/bus/mhi/pci_generic.c
@@ -212,6 +212,14 @@  static const struct mhi_pci_dev_info mhi_qcom_sdx55_info = {
 	.dma_data_width = 32
 };
 
+static const struct mhi_pci_dev_info mhi_qcom_sdx24_info = {
+	.name = "qcom-sdx24",
+	.edl = "qcom/prog_firehose_sdx24.mbn",
+	.config = &modem_qcom_v1_mhiv_config,
+	.bar_num = MHI_PCI_DEFAULT_BAR_NUM,
+	.dma_data_width = 32
+};
+
 static const struct mhi_channel_config mhi_quectel_em1xx_channels[] = {
 	MHI_CHANNEL_CONFIG_UL(0, "NMEA", 32, 0),
 	MHI_CHANNEL_CONFIG_DL(1, "NMEA", 32, 0),
@@ -254,6 +262,8 @@  static const struct mhi_pci_dev_info mhi_quectel_em1xx_info = {
 static const struct pci_device_id mhi_pci_id_table[] = {
 	{ PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0306),
 		.driver_data = (kernel_ulong_t) &mhi_qcom_sdx55_info },
+	{ PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0304),
+		.driver_data = (kernel_ulong_t) &mhi_qcom_sdx24_info },
 	{ PCI_DEVICE(0x1eac, 0x1001), /* EM120R-GL (sdx24) */
 		.driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info },
 	{ PCI_DEVICE(0x1eac, 0x1002), /* EM160R-GL (sdx24) */