| Message ID | 1619519590-3019-2-git-send-email-tdas@codeaurora.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add support for DISP/VIDEO/GPU CCs for SC7280 | expand |
On Tue, Apr 27, 2021 at 04:03:05PM +0530, Taniya Das wrote: > Add device tree bindings for display clock controller subsystem for > Qualcomm Technology Inc's SC7280 SoCs. > > Signed-off-by: Taniya Das <tdas@codeaurora.org> > --- > .../bindings/clock/qcom,sc7280-dispcc.yaml | 94 ++++++++++++++++++++++ > include/dt-bindings/clock/qcom,dispcc-sc7280.h | 55 +++++++++++++ > 2 files changed, 149 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml > create mode 100644 include/dt-bindings/clock/qcom,dispcc-sc7280.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml > new file mode 100644 > index 0000000..2178666 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml > @@ -0,0 +1,94 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,sc7280-dispcc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Display Clock & Reset Controller Binding for SC7280 > + > +maintainers: > + - Taniya Das <tdas@codeaurora.org> > + > +description: | > + Qualcomm display clock control module which supports the clocks, resets and > + power domains on SC7280. > + > + See also dt-bindings/clock/qcom,dispcc-sc7280.h. > + > +properties: > + compatible: > + const: qcom,sc7280-dispcc > + > + clocks: > + items: > + - description: Board XO source > + - description: GPLL0 source from GCC > + - description: Byte clock from DSI PHY > + - description: Pixel clock from DSI PHY > + - description: Link clock from DP PHY > + - description: VCO DIV clock from DP PHY > + - description: Link clock from EDP PHY > + - description: VCO DIV clock from EDP PHY > + > + clock-names: > + items: > + - const: bi_tcxo > + - const: gcc_disp_gpll0_clk > + - const: dsi0_phy_pll_out_byteclk > + - const: dsi0_phy_pll_out_dsiclk > + - const: dp_phy_pll_link_clk > + - const: dp_phy_pll_vco_div_clk > + - const: edp_phy_pll_link_clk > + - const: edp_phy_pll_vco_div_clk > + > + '#clock-cells': > + const: 1 > + > + '#reset-cells': > + const: 1 > + > + '#power-domain-cells': > + const: 1 > + > + reg: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - '#clock-cells' > + - '#reset-cells' > + - '#power-domain-cells' > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/qcom,gcc-sc7280.h> > + #include <dt-bindings/clock/qcom,rpmh.h> > + clock-controller@af00000 { > + compatible = "qcom,sc7280-dispcc"; > + reg = <0x0af00000 0x200000>; > + clocks = <&rpmhcc RPMH_CXO_CLK>, > + <&gcc GCC_DISP_GPLL0_CLK_SRC>, > + <&dsi_phy 0>, > + <&dsi_phy 1>, > + <&dp_phy 0>, > + <&dp_phy 1>, > + <&edp_phy 0>, > + <&edp_phy 1>; > + clock-names = "bi_tcxo", > + "gcc_disp_gpll0_clk", > + "dsi0_phy_pll_out_byteclk", > + "dsi0_phy_pll_out_dsiclk", > + "dp_phy_pll_link_clk", > + "dp_phy_pll_vco_div_clk", > + "edp_phy_pll_link_clk", > + "edp_phy_pll_vco_div_clk"; > + #clock-cells = <1>; > + #reset-cells = <1>; > + #power-domain-cells = <1>; > + }; > +... > diff --git a/include/dt-bindings/clock/qcom,dispcc-sc7280.h b/include/dt-bindings/clock/qcom,dispcc-sc7280.h > new file mode 100644 > index 0000000..2074b30 > --- /dev/null > +++ b/include/dt-bindings/clock/qcom,dispcc-sc7280.h > @@ -0,0 +1,55 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ Dual license please. I'm tired of telling the company that complained to me about having dual licensing for DT stuff not dual license their stuff. Please pass that on to your coworkers. Rob
Quoting Rob Herring (2021-05-03 12:18:37) > On Tue, Apr 27, 2021 at 04:03:05PM +0530, Taniya Das wrote: > > diff --git a/include/dt-bindings/clock/qcom,dispcc-sc7280.h b/include/dt-bindings/clock/qcom,dispcc-sc7280.h > > new file mode 100644 > > index 0000000..2074b30 > > --- /dev/null > > +++ b/include/dt-bindings/clock/qcom,dispcc-sc7280.h > > @@ -0,0 +1,55 @@ > > +/* SPDX-License-Identifier: GPL-2.0-only */ > > Dual license please. I'm tired of telling the company that complained to > me about having dual licensing for DT stuff not dual license their > stuff. Please pass that on to your coworkers. > Taniya, is this going to be resent?
Quoting Stephen Boyd (2021-06-01 23:55:04) > Quoting Rob Herring (2021-05-03 12:18:37) > > On Tue, Apr 27, 2021 at 04:03:05PM +0530, Taniya Das wrote: > > > diff --git a/include/dt-bindings/clock/qcom,dispcc-sc7280.h b/include/dt-bindings/clock/qcom,dispcc-sc7280.h > > > new file mode 100644 > > > index 0000000..2074b30 > > > --- /dev/null > > > +++ b/include/dt-bindings/clock/qcom,dispcc-sc7280.h > > > @@ -0,0 +1,55 @@ > > > +/* SPDX-License-Identifier: GPL-2.0-only */ > > > > Dual license please. I'm tired of telling the company that complained to > > me about having dual licensing for DT stuff not dual license their > > stuff. Please pass that on to your coworkers. > > > > Taniya, is this going to be resent? Also, can you update the gcc binding that was already merged?
Hello Rob, Thanks for the review. On 5/4/2021 12:48 AM, Rob Herring wrote: > On Tue, Apr 27, 2021 at 04:03:05PM +0530, Taniya Das wrote: >> Add device tree bindings for display clock controller subsystem for >> Qualcomm Technology Inc's SC7280 SoCs. >> >> Signed-off-by: Taniya Das <tdas@codeaurora.org> >> --- >> .../bindings/clock/qcom,sc7280-dispcc.yaml | 94 ++++++++++++++++++++++ >> include/dt-bindings/clock/qcom,dispcc-sc7280.h | 55 +++++++++++++ >> 2 files changed, 149 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml >> create mode 100644 include/dt-bindings/clock/qcom,dispcc-sc7280.h >> >> diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml >> new file mode 100644 >> index 0000000..2178666 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml >> @@ -0,0 +1,94 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +... >> diff --git a/include/dt-bindings/clock/qcom,dispcc-sc7280.h b/include/dt-bindings/clock/qcom,dispcc-sc7280.h >> new file mode 100644 >> index 0000000..2074b30 >> --- /dev/null >> +++ b/include/dt-bindings/clock/qcom,dispcc-sc7280.h >> @@ -0,0 +1,55 @@ >> +/* SPDX-License-Identifier: GPL-2.0-only */ > > Dual license please. I'm tired of telling the company that complained to > me about having dual licensing for DT stuff not dual license their > stuff. Please pass that on to your coworkers. > > Rob > Rob, I have taken a note on this and will be taken care from the next time. -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation. --
Hello Stephen, Thanks for your review. On 6/2/2021 12:28 PM, Stephen Boyd wrote: > Quoting Stephen Boyd (2021-06-01 23:55:04) >> Quoting Rob Herring (2021-05-03 12:18:37) >>> On Tue, Apr 27, 2021 at 04:03:05PM +0530, Taniya Das wrote: >>>> diff --git a/include/dt-bindings/clock/qcom,dispcc-sc7280.h b/include/dt-bindings/clock/qcom,dispcc-sc7280.h >>>> new file mode 100644 >>>> index 0000000..2074b30 >>>> --- /dev/null >>>> +++ b/include/dt-bindings/clock/qcom,dispcc-sc7280.h >>>> @@ -0,0 +1,55 @@ >>>> +/* SPDX-License-Identifier: GPL-2.0-only */ >>> >>> Dual license please. I'm tired of telling the company that complained to >>> me about having dual licensing for DT stuff not dual license their >>> stuff. Please pass that on to your coworkers. >>> >> >> Taniya, is this going to be resent? > > Also, can you update the gcc binding that was already merged? > Yes, it will be taken care in the next patch series.
diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml new file mode 100644 index 0000000..2178666 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml @@ -0,0 +1,94 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,sc7280-dispcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Display Clock & Reset Controller Binding for SC7280 + +maintainers: + - Taniya Das <tdas@codeaurora.org> + +description: | + Qualcomm display clock control module which supports the clocks, resets and + power domains on SC7280. + + See also dt-bindings/clock/qcom,dispcc-sc7280.h. + +properties: + compatible: + const: qcom,sc7280-dispcc + + clocks: + items: + - description: Board XO source + - description: GPLL0 source from GCC + - description: Byte clock from DSI PHY + - description: Pixel clock from DSI PHY + - description: Link clock from DP PHY + - description: VCO DIV clock from DP PHY + - description: Link clock from EDP PHY + - description: VCO DIV clock from EDP PHY + + clock-names: + items: + - const: bi_tcxo + - const: gcc_disp_gpll0_clk + - const: dsi0_phy_pll_out_byteclk + - const: dsi0_phy_pll_out_dsiclk + - const: dp_phy_pll_link_clk + - const: dp_phy_pll_vco_div_clk + - const: edp_phy_pll_link_clk + - const: edp_phy_pll_vco_div_clk + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sc7280.h> + #include <dt-bindings/clock/qcom,rpmh.h> + clock-controller@af00000 { + compatible = "qcom,sc7280-dispcc"; + reg = <0x0af00000 0x200000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_DISP_GPLL0_CLK_SRC>, + <&dsi_phy 0>, + <&dsi_phy 1>, + <&dp_phy 0>, + <&dp_phy 1>, + <&edp_phy 0>, + <&edp_phy 1>; + clock-names = "bi_tcxo", + "gcc_disp_gpll0_clk", + "dsi0_phy_pll_out_byteclk", + "dsi0_phy_pll_out_dsiclk", + "dp_phy_pll_link_clk", + "dp_phy_pll_vco_div_clk", + "edp_phy_pll_link_clk", + "edp_phy_pll_vco_div_clk"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; +... diff --git a/include/dt-bindings/clock/qcom,dispcc-sc7280.h b/include/dt-bindings/clock/qcom,dispcc-sc7280.h new file mode 100644 index 0000000..2074b30 --- /dev/null +++ b/include/dt-bindings/clock/qcom,dispcc-sc7280.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2021, The Linux Foundation. All rights reserved. + */ + +#ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SC7280_H +#define _DT_BINDINGS_CLK_QCOM_DISP_CC_SC7280_H + +/* DISP_CC clocks */ +#define DISP_CC_PLL0 0 +#define DISP_CC_MDSS_AHB_CLK 1 +#define DISP_CC_MDSS_AHB_CLK_SRC 2 +#define DISP_CC_MDSS_BYTE0_CLK 3 +#define DISP_CC_MDSS_BYTE0_CLK_SRC 4 +#define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 5 +#define DISP_CC_MDSS_BYTE0_INTF_CLK 6 +#define DISP_CC_MDSS_DP_AUX_CLK 7 +#define DISP_CC_MDSS_DP_AUX_CLK_SRC 8 +#define DISP_CC_MDSS_DP_CRYPTO_CLK 9 +#define DISP_CC_MDSS_DP_CRYPTO_CLK_SRC 10 +#define DISP_CC_MDSS_DP_LINK_CLK 11 +#define DISP_CC_MDSS_DP_LINK_CLK_SRC 12 +#define DISP_CC_MDSS_DP_LINK_DIV_CLK_SRC 13 +#define DISP_CC_MDSS_DP_LINK_INTF_CLK 14 +#define DISP_CC_MDSS_DP_PIXEL_CLK 15 +#define DISP_CC_MDSS_DP_PIXEL_CLK_SRC 16 +#define DISP_CC_MDSS_EDP_AUX_CLK 17 +#define DISP_CC_MDSS_EDP_AUX_CLK_SRC 18 +#define DISP_CC_MDSS_EDP_LINK_CLK 19 +#define DISP_CC_MDSS_EDP_LINK_CLK_SRC 20 +#define DISP_CC_MDSS_EDP_LINK_DIV_CLK_SRC 21 +#define DISP_CC_MDSS_EDP_LINK_INTF_CLK 22 +#define DISP_CC_MDSS_EDP_PIXEL_CLK 23 +#define DISP_CC_MDSS_EDP_PIXEL_CLK_SRC 24 +#define DISP_CC_MDSS_ESC0_CLK 25 +#define DISP_CC_MDSS_ESC0_CLK_SRC 26 +#define DISP_CC_MDSS_MDP_CLK 27 +#define DISP_CC_MDSS_MDP_CLK_SRC 28 +#define DISP_CC_MDSS_MDP_LUT_CLK 29 +#define DISP_CC_MDSS_NON_GDSC_AHB_CLK 30 +#define DISP_CC_MDSS_PCLK0_CLK 31 +#define DISP_CC_MDSS_PCLK0_CLK_SRC 32 +#define DISP_CC_MDSS_ROT_CLK 33 +#define DISP_CC_MDSS_ROT_CLK_SRC 34 +#define DISP_CC_MDSS_RSCC_AHB_CLK 35 +#define DISP_CC_MDSS_RSCC_VSYNC_CLK 36 +#define DISP_CC_MDSS_VSYNC_CLK 37 +#define DISP_CC_MDSS_VSYNC_CLK_SRC 38 +#define DISP_CC_SLEEP_CLK 39 +#define DISP_CC_XO_CLK 40 + +/* DISP_CC power domains */ +#define DISP_CC_MDSS_CORE_GDSC 0 + +#endif
Add device tree bindings for display clock controller subsystem for Qualcomm Technology Inc's SC7280 SoCs. Signed-off-by: Taniya Das <tdas@codeaurora.org> --- .../bindings/clock/qcom,sc7280-dispcc.yaml | 94 ++++++++++++++++++++++ include/dt-bindings/clock/qcom,dispcc-sc7280.h | 55 +++++++++++++ 2 files changed, 149 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml create mode 100644 include/dt-bindings/clock/qcom,dispcc-sc7280.h