Message ID | 1619519590-3019-4-git-send-email-tdas@codeaurora.org |
---|---|
State | New |
Headers | show |
Series | Add support for DISP/VIDEO/GPU CCs for SC7280 | expand |
Quoting Taniya Das (2021-04-27 03:33:07) > diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml > index df943c4..7e3f9e7 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml > @@ -11,11 +11,12 @@ maintainers: > > description: | > Qualcomm graphics clock control module which supports the clocks, resets and > - power domains on SDM845/SC7180/SM8150/SM8250. > + power domains on SDM845/SC7180/SC7280/SM8150/SM8250. Can we stop updating this line? Just say "power domains on Qualcomm SoCs"? > > See also: > dt-bindings/clock/qcom,gpucc-sdm845.h > dt-bindings/clock/qcom,gpucc-sc7180.h > + dt-bindings/clock/qcom,gpucc-sc7280.h > dt-bindings/clock/qcom,gpucc-sm8150.h > dt-bindings/clock/qcom,gpucc-sm8250.h > > @@ -24,6 +25,7 @@ properties: > enum: > - qcom,sdm845-gpucc > - qcom,sc7180-gpucc > + - qcom,sc7280-gpucc > - qcom,sm8150-gpucc > - qcom,sm8250-gpucc >
Hello Stephen, Thanks for your review. On 6/2/2021 12:30 PM, Stephen Boyd wrote: > Quoting Taniya Das (2021-04-27 03:33:07) >> diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml >> index df943c4..7e3f9e7 100644 >> --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml >> +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml >> @@ -11,11 +11,12 @@ maintainers: >> >> description: | >> Qualcomm graphics clock control module which supports the clocks, resets and >> - power domains on SDM845/SC7180/SM8150/SM8250. >> + power domains on SDM845/SC7180/SC7280/SM8150/SM8250. > > Can we stop updating this line? Just say "power domains on Qualcomm > SoCs"? > This will be updated in the next series. >> >> See also: >> dt-bindings/clock/qcom,gpucc-sdm845.h >> dt-bindings/clock/qcom,gpucc-sc7180.h >> + dt-bindings/clock/qcom,gpucc-sc7280.h >> dt-bindings/clock/qcom,gpucc-sm8150.h >> dt-bindings/clock/qcom,gpucc-sm8250.h >> >> @@ -24,6 +25,7 @@ properties: >> enum: >> - qcom,sdm845-gpucc >> - qcom,sc7180-gpucc >> + - qcom,sc7280-gpucc >> - qcom,sm8150-gpucc >> - qcom,sm8250-gpucc >> -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation. --
diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml index df943c4..7e3f9e7 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml @@ -11,11 +11,12 @@ maintainers: description: | Qualcomm graphics clock control module which supports the clocks, resets and - power domains on SDM845/SC7180/SM8150/SM8250. + power domains on SDM845/SC7180/SC7280/SM8150/SM8250. See also: dt-bindings/clock/qcom,gpucc-sdm845.h dt-bindings/clock/qcom,gpucc-sc7180.h + dt-bindings/clock/qcom,gpucc-sc7280.h dt-bindings/clock/qcom,gpucc-sm8150.h dt-bindings/clock/qcom,gpucc-sm8250.h @@ -24,6 +25,7 @@ properties: enum: - qcom,sdm845-gpucc - qcom,sc7180-gpucc + - qcom,sc7280-gpucc - qcom,sm8150-gpucc - qcom,sm8250-gpucc diff --git a/include/dt-bindings/clock/qcom,gpucc-sc7280.h b/include/dt-bindings/clock/qcom,gpucc-sc7280.h new file mode 100644 index 0000000..37999e6 --- /dev/null +++ b/include/dt-bindings/clock/qcom,gpucc-sc7280.h @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2021, The Linux Foundation. All rights reserved. + */ + +#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SC7280_H +#define _DT_BINDINGS_CLK_QCOM_GPU_CC_SC7280_H + +/* GPU_CC clocks */ +#define GPU_CC_PLL0 0 +#define GPU_CC_PLL1 1 +#define GPU_CC_AHB_CLK 2 +#define GPU_CC_CB_CLK 3 +#define GPU_CC_CRC_AHB_CLK 4 +#define GPU_CC_CX_GMU_CLK 5 +#define GPU_CC_CX_SNOC_DVM_CLK 6 +#define GPU_CC_CXO_AON_CLK 7 +#define GPU_CC_CXO_CLK 8 +#define GPU_CC_GMU_CLK_SRC 9 +#define GPU_CC_GX_GMU_CLK 10 +#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 11 +#define GPU_CC_HUB_AHB_DIV_CLK_SRC 12 +#define GPU_CC_HUB_AON_CLK 13 +#define GPU_CC_HUB_CLK_SRC 14 +#define GPU_CC_HUB_CX_INT_CLK 15 +#define GPU_CC_HUB_CX_INT_DIV_CLK_SRC 16 +#define GPU_CC_MND1X_0_GFX3D_CLK 17 +#define GPU_CC_MND1X_1_GFX3D_CLK 18 +#define GPU_CC_SLEEP_CLK 19 + +/* GPU_CC power domains */ +#define GPU_CC_CX_GDSC 0 +#define GPU_CC_GX_GDSC 1 + +#endif
Add device tree bindings for graphics clock subsystem clock controller for Qualcomm Technology Inc's SC7280 SoCs. Signed-off-by: Taniya Das <tdas@codeaurora.org> --- .../devicetree/bindings/clock/qcom,gpucc.yaml | 4 ++- include/dt-bindings/clock/qcom,gpucc-sc7280.h | 35 ++++++++++++++++++++++ 2 files changed, 38 insertions(+), 1 deletion(-) create mode 100644 include/dt-bindings/clock/qcom,gpucc-sc7280.h