From patchwork Wed Feb 10 13:34:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 380226 Delivered-To: patch@linaro.org Received: by 2002:a02:b18a:0:0:0:0:0 with SMTP id t10csp1165034jah; Wed, 10 Feb 2021 05:37:31 -0800 (PST) X-Google-Smtp-Source: ABdhPJy/302C22aUzLsyeEqI2gUdhLOzqraIVBHqva5T+XCeKIR+zIcDO3TRgXWeBOjiyVH3CWos X-Received: by 2002:a05:6402:b45:: with SMTP id bx5mr3310216edb.235.1612964251080; Wed, 10 Feb 2021 05:37:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1612964251; cv=none; d=google.com; s=arc-20160816; b=NVm7uiOO+3Ct5O22T1dCJ9pIVC9a6h+uyPTyZgwCnXkB+Hal+Nq0zUPDetPQBVYRb0 4kp+1XvFAZh+v6GvTm+vKzdYWqMH9+059kZYvT5VvDbaA9rx8semt6ZSyawE4+jyGZkJ V4VzGf1/KxsTRknYL2N1EvF3SaT1gBjzE9pJIEcLbHORPF18VtmjaT22iLg88IBe42mb sVfex/3/utVN80htqCHFyN4nHy2G3IgjUrldt5PNiS/U335FRxFDipFcyOhMT7bjPkJf etT3rt4maB1ydblET9QuQjUHZbvUxMDfqIsBi6bwVg/ePV4rklzXGMvAdfXfSA7hx6CB izEA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=aEjgbQ4louFcHEKPjuOPOwDLbEqUCZLI98DdvpgiOt0=; b=Haj4K/fyV9vWTXwOUSn+CVFdM4Ye4mVAuvf8B2x9oA5dGWmsBTCLZTLBAwcP/hq3YR Xn14wpcjrdm32eJWJ8XYGkIUdWU/IBu83DOdCxXBxJhexlGUIMWkR6Qos9YA9xryTtic xaLRedcwXtDICVmvjN/Am6TKHgRPUlVUP83fmn2tdirsGcioFAKPXdZ6Rf/C6Afzc5/6 Ben8tb4IIQIgOehW1QSJAtn+2ROt/+zScOpt/BIJ5Jk14AqNNJIryMYs85O79vywAdjb H+GsoddUQf/leajqaeY3L8VPruBoNKXQS1uZcBlP3MolzXiZz7RyV7bLEzS4YrW9/3VA S66Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ZAPNNRkj; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n26si1274684ejg.362.2021.02.10.05.37.30; Wed, 10 Feb 2021 05:37:31 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ZAPNNRkj; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231731AbhBJNh1 (ORCPT + 16 others); Wed, 10 Feb 2021 08:37:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58512 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231709AbhBJNhR (ORCPT ); Wed, 10 Feb 2021 08:37:17 -0500 Received: from mail-lj1-x234.google.com (mail-lj1-x234.google.com [IPv6:2a00:1450:4864:20::234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E1593C061756 for ; Wed, 10 Feb 2021 05:36:35 -0800 (PST) Received: by mail-lj1-x234.google.com with SMTP id c18so2825041ljd.9 for ; Wed, 10 Feb 2021 05:36:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=aEjgbQ4louFcHEKPjuOPOwDLbEqUCZLI98DdvpgiOt0=; b=ZAPNNRkjIckBGyYA/DFh+fSTljsaVhNN0TgvkVI9WTzP8+PTJR11eGfJNnC1BgBX0d hK5wVMRfHi6eEhP9RncbyzA1gCx0Zmy1slL+1IUZai6qkVfkuj8FviSgUgQyPTsFQ1ii D2uVyMHHyfRv7fo6r0BRzO2zt2nt6Q8LlqnVPyV8f/SMThJMRHS4zt6re4uBn6wsza/d CzM393UNWEL/CikFVMUsCdzKaS9882E5RLw7zq0g0GaG5ufMZuZ0d/+2Cka6+4P4P2B1 oy4CwuIhJoBWfdp2FwcrY91rYLR7/H5AAvLtx9vHTt/q1tLkw+EHx2svZ4fomL2mAe95 34OQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=aEjgbQ4louFcHEKPjuOPOwDLbEqUCZLI98DdvpgiOt0=; b=MlW+Nf/vYXS9kx7YWL2URi995sm6962SqdVsDUMtcczj2K4nmPBr3gf7CnTpaLU0ug 7n7vd+c9J8I+m4THkkLJ1lWxUHBDQ+qnlUSbbcqvOH6ww2jqBAzmVhnU08BIvmbcKDl/ jOV7w1a0Uzc7SMGVhvKhvf+F14Bxx+dGET9QVke925Kl14jfXP4fF3LT+YdyE30PBrCM KwK9ogkmXMY5QhSmqJ505uEwRdeXz8htm8m4PkRum1vvOiYsQYSMYYsPfA3dakCLKhIM 7S24JjBt8KcfO3xCk9AB06duGZop4SXNRDRqqV5Ep6dcz9W1mXTXo5fCl4t5JX03yESH /OxA== X-Gm-Message-State: AOAM531JSK/1xoQr1gYr74153O/eldvu3hkJEBUHzsnJtN2OuBBZRhpL tuItJyRkOu9dqXv1hNbjBeW02g== X-Received: by 2002:a2e:3019:: with SMTP id w25mr2019432ljw.430.1612964194425; Wed, 10 Feb 2021 05:36:34 -0800 (PST) Received: from eriador.lan ([94.25.229.138]) by smtp.gmail.com with ESMTPSA id c8sm332629lfb.168.2021.02.10.05.36.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Feb 2021 05:36:33 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Doug Anderson Cc: linux-arm-msm@vger.kernel.org Subject: [PATCH v4 1/4] arm64: dts: qcom: sm8250: split spi pinctrl config Date: Wed, 10 Feb 2021 16:34:55 +0300 Message-Id: <20210210133458.1201066-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210210133458.1201066-1-dmitry.baryshkov@linaro.org> References: <20210210133458.1201066-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org As discussed on linux-arm-msm list, start splitting sm8250 pinctrl settings into generic and board-specific parts. The first part to receive such treatment is the spi, so split spi pinconf to the board device tree. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 6 + arch/arm64/boot/dts/qcom/sm8250.dtsi | 300 +++++------------------ 2 files changed, 66 insertions(+), 240 deletions(-) -- 2.30.0 Reviewed-by: Douglas Anderson diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts index 2f0528d01299..443206f64061 100644 --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts @@ -1352,3 +1352,9 @@ &vamacro { vdd-micb-supply = <&vreg_s4a_1p8>; qcom,dmic-sample-rate = <600000>; }; + +/* PINCTRL - additions to nodes defined in sm8250.dtsi */ +&qup_spi0_default { + drive-strength = <6>; + bias-disable; +}; diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 947e1accae3a..51d103671759 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -2984,303 +2984,123 @@ config { }; qup_spi0_default: qup-spi0-default { - mux { - pins = "gpio28", "gpio29", - "gpio30", "gpio31"; - function = "qup0"; - }; - - config { - pins = "gpio28", "gpio29", - "gpio30", "gpio31"; - drive-strength = <6>; - bias-disable; - }; + pins = "gpio28", "gpio29", + "gpio30", "gpio31"; + function = "qup0"; }; qup_spi1_default: qup-spi1-default { - mux { - pins = "gpio4", "gpio5", - "gpio6", "gpio7"; - function = "qup1"; - }; - - config { - pins = "gpio4", "gpio5", - "gpio6", "gpio7"; - drive-strength = <6>; - bias-disable; - }; + pins = "gpio4", "gpio5", + "gpio6", "gpio7"; + function = "qup1"; }; qup_spi2_default: qup-spi2-default { - mux { - pins = "gpio115", "gpio116", - "gpio117", "gpio118"; - function = "qup2"; - }; - - config { - pins = "gpio115", "gpio116", - "gpio117", "gpio118"; - drive-strength = <6>; - bias-disable; - }; + pins = "gpio115", "gpio116", + "gpio117", "gpio118"; + function = "qup2"; }; qup_spi3_default: qup-spi3-default { - mux { - pins = "gpio119", "gpio120", - "gpio121", "gpio122"; - function = "qup3"; - }; - - config { - pins = "gpio119", "gpio120", - "gpio121", "gpio122"; - drive-strength = <6>; - bias-disable; - }; + pins = "gpio119", "gpio120", + "gpio121", "gpio122"; + function = "qup3"; }; qup_spi4_default: qup-spi4-default { - mux { - pins = "gpio8", "gpio9", - "gpio10", "gpio11"; - function = "qup4"; - }; - - config { - pins = "gpio8", "gpio9", - "gpio10", "gpio11"; - drive-strength = <6>; - bias-disable; - }; + pins = "gpio8", "gpio9", + "gpio10", "gpio11"; + function = "qup4"; }; qup_spi5_default: qup-spi5-default { - mux { - pins = "gpio12", "gpio13", - "gpio14", "gpio15"; - function = "qup5"; - }; - - config { - pins = "gpio12", "gpio13", - "gpio14", "gpio15"; - drive-strength = <6>; - bias-disable; - }; + pins = "gpio12", "gpio13", + "gpio14", "gpio15"; + function = "qup5"; }; qup_spi6_default: qup-spi6-default { - mux { - pins = "gpio16", "gpio17", - "gpio18", "gpio19"; - function = "qup6"; - }; - - config { - pins = "gpio16", "gpio17", - "gpio18", "gpio19"; - drive-strength = <6>; - bias-disable; - }; + pins = "gpio16", "gpio17", + "gpio18", "gpio19"; + function = "qup6"; }; qup_spi7_default: qup-spi7-default { - mux { - pins = "gpio20", "gpio21", - "gpio22", "gpio23"; - function = "qup7"; - }; - - config { - pins = "gpio20", "gpio21", - "gpio22", "gpio23"; - drive-strength = <6>; - bias-disable; - }; + pins = "gpio20", "gpio21", + "gpio22", "gpio23"; + function = "qup7"; }; qup_spi8_default: qup-spi8-default { - mux { - pins = "gpio24", "gpio25", - "gpio26", "gpio27"; - function = "qup8"; - }; - - config { - pins = "gpio24", "gpio25", - "gpio26", "gpio27"; - drive-strength = <6>; - bias-disable; - }; + pins = "gpio24", "gpio25", + "gpio26", "gpio27"; + function = "qup8"; }; qup_spi9_default: qup-spi9-default { - mux { - pins = "gpio125", "gpio126", - "gpio127", "gpio128"; - function = "qup9"; - }; - - config { - pins = "gpio125", "gpio126", - "gpio127", "gpio128"; - drive-strength = <6>; - bias-disable; - }; + pins = "gpio125", "gpio126", + "gpio127", "gpio128"; + function = "qup9"; }; qup_spi10_default: qup-spi10-default { - mux { - pins = "gpio129", "gpio130", - "gpio131", "gpio132"; - function = "qup10"; - }; - - config { - pins = "gpio129", "gpio130", - "gpio131", "gpio132"; - drive-strength = <6>; - bias-disable; - }; + pins = "gpio129", "gpio130", + "gpio131", "gpio132"; + function = "qup10"; }; qup_spi11_default: qup-spi11-default { - mux { - pins = "gpio60", "gpio61", - "gpio62", "gpio63"; - function = "qup11"; - }; - - config { - pins = "gpio60", "gpio61", - "gpio62", "gpio63"; - drive-strength = <6>; - bias-disable; - }; + pins = "gpio60", "gpio61", + "gpio62", "gpio63"; + function = "qup11"; }; qup_spi12_default: qup-spi12-default { - mux { - pins = "gpio32", "gpio33", - "gpio34", "gpio35"; - function = "qup12"; - }; - - config { - pins = "gpio32", "gpio33", - "gpio34", "gpio35"; - drive-strength = <6>; - bias-disable; - }; + pins = "gpio32", "gpio33", + "gpio34", "gpio35"; + function = "qup12"; }; qup_spi13_default: qup-spi13-default { - mux { - pins = "gpio36", "gpio37", - "gpio38", "gpio39"; - function = "qup13"; - }; - - config { - pins = "gpio36", "gpio37", - "gpio38", "gpio39"; - drive-strength = <6>; - bias-disable; - }; + pins = "gpio36", "gpio37", + "gpio38", "gpio39"; + function = "qup13"; }; qup_spi14_default: qup-spi14-default { - mux { - pins = "gpio40", "gpio41", - "gpio42", "gpio43"; - function = "qup14"; - }; - - config { - pins = "gpio40", "gpio41", - "gpio42", "gpio43"; - drive-strength = <6>; - bias-disable; - }; + pins = "gpio40", "gpio41", + "gpio42", "gpio43"; + function = "qup14"; }; qup_spi15_default: qup-spi15-default { - mux { - pins = "gpio44", "gpio45", - "gpio46", "gpio47"; - function = "qup15"; - }; - - config { - pins = "gpio44", "gpio45", - "gpio46", "gpio47"; - drive-strength = <6>; - bias-disable; - }; + pins = "gpio44", "gpio45", + "gpio46", "gpio47"; + function = "qup15"; }; qup_spi16_default: qup-spi16-default { - mux { - pins = "gpio48", "gpio49", - "gpio50", "gpio51"; - function = "qup16"; - }; - - config { - pins = "gpio48", "gpio49", - "gpio50", "gpio51"; - drive-strength = <6>; - bias-disable; - }; + pins = "gpio48", "gpio49", + "gpio50", "gpio51"; + function = "qup16"; }; qup_spi17_default: qup-spi17-default { - mux { - pins = "gpio52", "gpio53", - "gpio54", "gpio55"; - function = "qup17"; - }; - - config { - pins = "gpio52", "gpio53", - "gpio54", "gpio55"; - drive-strength = <6>; - bias-disable; - }; + pins = "gpio52", "gpio53", + "gpio54", "gpio55"; + function = "qup17"; }; qup_spi18_default: qup-spi18-default { - mux { - pins = "gpio56", "gpio57", - "gpio58", "gpio59"; - function = "qup18"; - }; - - config { - pins = "gpio56", "gpio57", - "gpio58", "gpio59"; - drive-strength = <6>; - bias-disable; - }; + pins = "gpio56", "gpio57", + "gpio58", "gpio59"; + function = "qup18"; }; qup_spi19_default: qup-spi19-default { - mux { - pins = "gpio0", "gpio1", - "gpio2", "gpio3"; - function = "qup19"; - }; - - config { - pins = "gpio0", "gpio1", - "gpio2", "gpio3"; - drive-strength = <6>; - bias-disable; - }; + pins = "gpio0", "gpio1", + "gpio2", "gpio3"; + function = "qup19"; }; qup_uart2_default: qup-uart2-default {