From patchwork Fri May 21 12:49:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 444676 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp947026jac; Fri, 21 May 2021 05:50:40 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyy1wZdOISXJNeNPVfIMGZUPqu8IW0X4UDYkjGgP/cRJnzMyQM8V4MFp8/ZqOs+vERb83z9 X-Received: by 2002:a92:c243:: with SMTP id k3mr13041973ilo.81.1621601440489; Fri, 21 May 2021 05:50:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621601440; cv=none; d=google.com; s=arc-20160816; b=RgMGTrGmuxUkAvbg8IfzeVd6Nvk0VHs+9/NdFpTBGV/kigtIQNX/yMaI1aZ6Oit+Aq rwMVClyIP+LhU71Xs334sYPRLxO5tYjgWXdKTnd54RxKjuV9E3cZoghsdp2bF+u4lETw M6gNN/IBtrUdyOMTWx6PhPoxoDZslFGexC5D9YY8PUwOQObARTkzIq5nlY+ylDtxavNf +QMuqH80xwSmZCmz/PAQ8/KwJ2RWKSMzffYV7+R87frxRhxW7EeQA7U9lgojFSyBJhXS 7dK+2+TOjXSDzFcTZBWmZrT8qS4TLoa29Axbw0exaWfV2wj7z90fm/px2Yg2AG1SPqZp koYg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=sKLBX4jBLVQvnyMr1Ww7CASagKoijpefcDJjIzYZaM4=; b=TGOlmw9oxGeUhdUvsjIqOd9gYHDrPGK3CNMiQ5NJvF+wBKTJy74csDFe4xOMQ5tMNi CEa4lmPQIjly+CXP3P39tDCmVwqEFaToL8hFXfGLEXYU9nhHNIW4c5xpbi4acxZith8u CTexS7CQMQ9RLYL3//9uyfQVjcOxMpFDQ395Es6+SM1e9SeWkeDzzG3sc6V8XfudQROu DRwFodeuR6FJlsk0aqxzyDqoF0pkiZjVwFvz/RmUKwJpFzW8jPero3x4q/KGo7f0JL4D 7oQxZc7mGhFdHC0dBAg33trVw5OCu77ueHfuFV7WhPwEEcK+2oTFEovElpw99fLdu2oH 2L+Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=cebzmsoq; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id m18si422285ili.129.2021.05.21.05.50.40; Fri, 21 May 2021 05:50:40 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=cebzmsoq; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234655AbhEUMv6 (ORCPT + 17 others); Fri, 21 May 2021 08:51:58 -0400 Received: from mail.kernel.org ([198.145.29.99]:33836 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234673AbhEUMvo (ORCPT ); Fri, 21 May 2021 08:51:44 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id D126F6128A; Fri, 21 May 2021 12:50:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1621601421; bh=9SoiHu6HAdAusAoi4raCnnFpxv209nzRo5hMIPpogYg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cebzmsoqNT0A2AJNtcOjFrWosZBsZew71Do9d5qaQy5KPgjDxlHms/QE/OZyvrwmq 5VX/GJ2IF2C5AYgmvvIg7l+X/4KXeanB1l1DGxClPk0BLzkZ/41wszknt/i1oTsBbF /MKqOy69Wc9lKimXmn0Xh0h0r9InwrNn8EeDIjGu+wgo+B2xiEvYhPyEjOxgDZaPpH 3CMGK27fwb4HbQ4WW7JVQtQTEAPo9fkoCDeK+mmibCx858bL96KNMjqfxuU8ezg0hy g+nsas1XW2RtbXHT2n/7jAxHrxPNkrEGAQDLt1H+gJ3DmY7U4sg20L1oi9sa0ykD37 RnX//g5cLKhcQ== From: Vinod Koul To: Rob Clark Cc: linux-arm-msm@vger.kernel.org, Bjorn Andersson , Vinod Koul , David Airlie , Daniel Vetter , Jonathan Marek , Dmitry Baryshkov , Abhinav Kumar , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [RFC PATCH 04/13] drm/msm/disp/dpu1: Add support for DSC in pingpong block Date: Fri, 21 May 2021 18:19:34 +0530 Message-Id: <20210521124946.3617862-6-vkoul@kernel.org> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210521124946.3617862-1-vkoul@kernel.org> References: <20210521124946.3617862-1-vkoul@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In SDM845, DSC can be enabled by writing to pingpong block registers, so add support for DSC in hw_pp Signed-off-by: Vinod Koul --- .../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 32 +++++++++++++++++++ .../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h | 14 ++++++++ 2 files changed, 46 insertions(+) -- 2.26.3 diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c index 245a7a62b5c6..07fc131ca9aa 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c @@ -28,6 +28,9 @@ #define PP_FBC_MODE 0x034 #define PP_FBC_BUDGET_CTL 0x038 #define PP_FBC_LOSSY_MODE 0x03C +#define PP_DSC_MODE 0x0a0 +#define PP_DCE_DATA_IN_SWAP 0x0ac +#define PP_DCE_DATA_OUT_SWAP 0x0c8 #define PP_DITHER_EN 0x000 #define PP_DITHER_BITDEPTH 0x004 @@ -245,6 +248,32 @@ static u32 dpu_hw_pp_get_line_count(struct dpu_hw_pingpong *pp) return line; } +static int dpu_hw_pp_dsc_enable(struct dpu_hw_pingpong *pp) +{ + struct dpu_hw_blk_reg_map *c = &pp->hw; + + DPU_REG_WRITE(c, PP_DSC_MODE, 1); + return 0; +} + +static void dpu_hw_pp_dsc_disable(struct dpu_hw_pingpong *pp) +{ + struct dpu_hw_blk_reg_map *c = &pp->hw; + + DPU_REG_WRITE(c, PP_DSC_MODE, 0); +} + +static int dpu_hw_pp_setup_dsc(struct dpu_hw_pingpong *pp) +{ + struct dpu_hw_blk_reg_map *pp_c = &pp->hw; + int data; + + data = DPU_REG_READ(pp_c, PP_DCE_DATA_OUT_SWAP); + data |= BIT(18); /* endian flip */ + DPU_REG_WRITE(pp_c, PP_DCE_DATA_OUT_SWAP, data); + return 0; +} + static void _setup_pingpong_ops(struct dpu_hw_pingpong *c, unsigned long features) { @@ -256,6 +285,9 @@ static void _setup_pingpong_ops(struct dpu_hw_pingpong *c, c->ops.get_autorefresh = dpu_hw_pp_get_autorefresh_config; c->ops.poll_timeout_wr_ptr = dpu_hw_pp_poll_timeout_wr_ptr; c->ops.get_line_count = dpu_hw_pp_get_line_count; + c->ops.setup_dsc = dpu_hw_pp_setup_dsc; + c->ops.enable_dsc = dpu_hw_pp_dsc_enable; + c->ops.disable_dsc = dpu_hw_pp_dsc_disable; if (test_bit(DPU_PINGPONG_DITHER, &features)) c->ops.setup_dither = dpu_hw_pp_setup_dither; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h index 845b9ce80e31..5058e41ffbc0 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h @@ -124,6 +124,20 @@ struct dpu_hw_pingpong_ops { */ void (*setup_dither)(struct dpu_hw_pingpong *pp, struct dpu_hw_dither_cfg *cfg); + /** + * Enable DSC + */ + int (*enable_dsc)(struct dpu_hw_pingpong *pp); + + /** + * Disable DSC + */ + void (*disable_dsc)(struct dpu_hw_pingpong *pp); + + /** + * Setup DSC + */ + int (*setup_dsc)(struct dpu_hw_pingpong *pp); }; struct dpu_hw_pingpong {