From patchwork Sat Feb 12 18:21:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 542587 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3DC5C433FE for ; Sat, 12 Feb 2022 18:23:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229985AbiBLSXb (ORCPT ); Sat, 12 Feb 2022 13:23:31 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:47848 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229902AbiBLSX3 (ORCPT ); Sat, 12 Feb 2022 13:23:29 -0500 Received: from mail-pf1-x436.google.com (mail-pf1-x436.google.com [IPv6:2607:f8b0:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A6C9E6004A for ; Sat, 12 Feb 2022 10:23:11 -0800 (PST) Received: by mail-pf1-x436.google.com with SMTP id d187so21920636pfa.10 for ; Sat, 12 Feb 2022 10:23:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Ng+FJmRFoQc89QlNXGEu6Nz+DsWMowqD6JzTm0cBnHI=; b=VPJI5RfGfxcBSf0QCISXQcbfstewq+3Xs+C4gL6WufagubJPmyHN1LYFaXIqL+YlHz uIAzpSjT5zk7jpumLD3QfrKQhj3xn5kGYFV5jNqIDx/rtokTPd8Ha7wvaJKeUwAM8bum HP2OhF0laEajy6uQVBDTxSssHFmyF1ZI1JEXWoszjyLyJD0nJWiKT8Hw8ObO/FNuJ1Qq R4bTaty9M3qIo/tQ9N0Z4g5Ei9uEFtTn4eyArgXPkIHKAz+fIn6CXjS3+JoQplEsxgbA Bbo5M/ycAM8KLD+TR7m17FbqyfP53rA/ojJd8EcCnmU9nsnO3RnU5NoqBskCILFHmIXL T+HQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Ng+FJmRFoQc89QlNXGEu6Nz+DsWMowqD6JzTm0cBnHI=; b=jAunTRGkYPE9k2tcYADXqX+T8PwvIpliHGZUwSqAOQZ/Cb37axqMOaSu/R20mpK1jr KBM/CKpMQhsbJy2I4BJJcp9d5e44U+qmewOMhXPvLaG5MGTOx3GX03xQnhL5RrJ3ZhmX Pj+Pr0UuDdT4mM7Z8rMnq1CAaCdTYwF/Lz9kP6MkY/zYkKB2nKQ+UUrddaWp+0frm28+ zh2FCfLeKngal5Dtt3Uo8VMFGMNRyZr0aQS3AgQYAG7Zc4vu6uPdZcOKun2gHesSMUbd 6riFlSTLddNKlz1E2MYLz+J9+2sgO8xrfM+PyiZ9aUNiz5b+ii9vdeEXaWMpmAHfjg4b IvQw== X-Gm-Message-State: AOAM5314ccRWoHvmjiUE4weJ8Edq3DrZiPcdsfzPFJYHrstEYsBgzCDp EcCQS/dshQopGIHSBfvkDy5K X-Google-Smtp-Source: ABdhPJxzQw7S9tasrOjpKXFp+CMbejZJTVo1V7X6T1PPGnxNyTmSRhp1q/FXC/uKEFOs432QgWAE4A== X-Received: by 2002:a65:458f:: with SMTP id o15mr4100193pgq.92.1644690191159; Sat, 12 Feb 2022 10:23:11 -0800 (PST) Received: from localhost.localdomain ([27.111.75.57]) by smtp.gmail.com with ESMTPSA id g12sm14961987pfj.148.2022.02.12.10.23.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 12 Feb 2022 10:23:10 -0800 (PST) From: Manivannan Sadhasivam To: mhi@lists.linux.dev Cc: quic_hemantk@quicinc.com, quic_bbhatt@quicinc.com, quic_jhugo@quicinc.com, vinod.koul@linaro.org, bjorn.andersson@linaro.org, dmitry.baryshkov@linaro.org, quic_vbadigan@quicinc.com, quic_cang@quicinc.com, quic_skananth@quicinc.com, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, elder@linaro.org, Manivannan Sadhasivam Subject: [PATCH v3 18/25] bus: mhi: ep: Add support for handling MHI_RESET Date: Sat, 12 Feb 2022 23:51:10 +0530 Message-Id: <20220212182117.49438-19-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220212182117.49438-1-manivannan.sadhasivam@linaro.org> References: <20220212182117.49438-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for handling MHI_RESET in MHI endpoint stack. MHI_RESET will be issued by the host during shutdown and during error scenario so that it can recover the endpoint device without restarting the whole device. MHI_RESET handling involves resetting the internal MHI registers, data structures, state machines, resetting all channels/rings and setting MHICTRL.RESET bit to 0. Additionally the device will also move to READY state if the reset was due to SYS_ERR. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Alex Elder --- drivers/bus/mhi/ep/main.c | 53 +++++++++++++++++++++++++++++++++++++++ include/linux/mhi_ep.h | 2 ++ 2 files changed, 55 insertions(+) diff --git a/drivers/bus/mhi/ep/main.c b/drivers/bus/mhi/ep/main.c index 14cb08de4263..ddedd0fb19aa 100644 --- a/drivers/bus/mhi/ep/main.c +++ b/drivers/bus/mhi/ep/main.c @@ -471,6 +471,7 @@ static irqreturn_t mhi_ep_irq(int irq, void *data) struct device *dev = &mhi_cntrl->mhi_dev->dev; enum mhi_state state; u32 int_value; + bool mhi_reset; /* Acknowledge the interrupts */ int_value = mhi_ep_mmio_read(mhi_cntrl, MHI_CTRL_INT_STATUS_A7); @@ -479,6 +480,14 @@ static irqreturn_t mhi_ep_irq(int irq, void *data) /* Check for ctrl interrupt */ if (FIELD_GET(MHI_CTRL_INT_STATUS_A7_MSK, int_value)) { dev_dbg(dev, "Processing ctrl interrupt\n"); + mhi_ep_mmio_get_mhi_state(mhi_cntrl, &state, &mhi_reset); + if (mhi_reset) { + dev_info(dev, "Host triggered MHI reset!\n"); + disable_irq_nosync(mhi_cntrl->irq); + schedule_work(&mhi_cntrl->reset_work); + return IRQ_HANDLED; + } + mhi_ep_process_ctrl_interrupt(mhi_cntrl, state); } @@ -559,6 +568,49 @@ static void mhi_ep_abort_transfer(struct mhi_ep_cntrl *mhi_cntrl) mhi_cntrl->is_enabled = false; } +static void mhi_ep_reset_worker(struct work_struct *work) +{ + struct mhi_ep_cntrl *mhi_cntrl = container_of(work, struct mhi_ep_cntrl, reset_work); + struct device *dev = &mhi_cntrl->mhi_dev->dev; + enum mhi_state cur_state; + int ret; + + mhi_ep_abort_transfer(mhi_cntrl); + + spin_lock_bh(&mhi_cntrl->state_lock); + /* Reset MMIO to signal host that the MHI_RESET is completed in endpoint */ + mhi_ep_mmio_reset(mhi_cntrl); + cur_state = mhi_cntrl->mhi_state; + spin_unlock_bh(&mhi_cntrl->state_lock); + + /* + * Only proceed further if the reset is due to SYS_ERR. The host will + * issue reset during shutdown also and we don't need to do re-init in + * that case. + */ + if (cur_state == MHI_STATE_SYS_ERR) { + mhi_ep_mmio_init(mhi_cntrl); + + /* Set AMSS EE before signaling ready state */ + mhi_ep_mmio_set_env(mhi_cntrl, MHI_EP_AMSS_EE); + + /* All set, notify the host that we are ready */ + ret = mhi_ep_set_ready_state(mhi_cntrl); + if (ret) + return; + + dev_dbg(dev, "READY state notification sent to the host\n"); + + ret = mhi_ep_enable(mhi_cntrl); + if (ret) { + dev_err(dev, "Failed to enable MHI endpoint: %d\n", ret); + return; + } + + enable_irq(mhi_cntrl->irq); + } +} + int mhi_ep_power_up(struct mhi_ep_cntrl *mhi_cntrl) { struct device *dev = &mhi_cntrl->mhi_dev->dev; @@ -827,6 +879,7 @@ int mhi_ep_register_controller(struct mhi_ep_cntrl *mhi_cntrl, INIT_WORK(&mhi_cntrl->ring_work, mhi_ep_ring_worker); INIT_WORK(&mhi_cntrl->state_work, mhi_ep_state_worker); + INIT_WORK(&mhi_cntrl->reset_work, mhi_ep_reset_worker); mhi_cntrl->ring_wq = alloc_workqueue("mhi_ep_ring_wq", 0, 0); if (!mhi_cntrl->ring_wq) { diff --git a/include/linux/mhi_ep.h b/include/linux/mhi_ep.h index 4f86e7986c93..276d29fef465 100644 --- a/include/linux/mhi_ep.h +++ b/include/linux/mhi_ep.h @@ -75,6 +75,7 @@ struct mhi_ep_db_info { * @ring_wq: Dedicated workqueue for processing MHI rings * @state_work: State transition worker * @ring_work: Ring worker + * @reset_work: Worker for MHI Endpoint reset * @ch_db_list: List of queued channel doorbells * @st_transition_list: List of state transitions * @list_lock: Lock for protecting state transition and channel doorbell lists @@ -126,6 +127,7 @@ struct mhi_ep_cntrl { struct workqueue_struct *ring_wq; struct work_struct state_work; struct work_struct ring_work; + struct work_struct reset_work; struct list_head ch_db_list; struct list_head st_transition_list;