Message ID | 20220511220613.1015472-3-marijn.suijten@somainline.org |
---|---|
State | Accepted |
Commit | f82a2c212d6ce1e776a3fc8af6ce951ed00842b0 |
Headers | show |
Series | [1/7] arm64: dts: qcom: pm660: Use unique ADC5_VCOIN address in node name | expand |
On 12/05/2022 00:06, Marijn Suijten wrote: > The pm6125 comes with 9 GPIOs, without holes. > > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> It's the first version, how did the tag appear here? > --- > Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml | 2 ++ > 1 file changed, 2 insertions(+) This will need fixups or rebasing on my sets of PMIC gpio schema cleanup: https://lore.kernel.org/all/20220507194913.261121-1-krzysztof.kozlowski@linaro.org/ https://lore.kernel.org/all/20220508135932.132378-2-krzysztof.kozlowski@linaro.org/ Bjorn, let us know preferred order (who should rebase on who). Best regards, Krzysztof
On 2022-05-13 10:19:56, Krzysztof Kozlowski wrote: > On 12/05/2022 00:06, Marijn Suijten wrote: > > The pm6125 comes with 9 GPIOs, without holes. > > > > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> > > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> > > It's the first version, how did the tag appear here? We are friends and review each-others patches offline before spamming the mailing list with them, to save readers and maintainers here from pointing out glaring mistakes. I hope this is standard practice in companies too, or do you recommend aganst us doing this? > > --- > > Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml | 2 ++ > > 1 file changed, 2 insertions(+) > > > This will need fixups or rebasing on my sets of PMIC gpio schema cleanup: Ack. > https://lore.kernel.org/all/20220507194913.261121-1-krzysztof.kozlowski@linaro.org/ > https://lore.kernel.org/all/20220508135932.132378-2-krzysztof.kozlowski@linaro.org/ > > Bjorn, > let us know preferred order (who should rebase on who). I prefer yours to be applied first, so that I can retest this patchseries with stricter / more correct dt-bindings introduced by it. My series can also be resent with the notice that it has already been rebased on top of your series, after collecting more reviews. Where necessary, I can review your series too if that helps getting it in sooner. - Marijn
On 13/05/2022 11:17, Marijn Suijten wrote: > On 2022-05-13 10:19:56, Krzysztof Kozlowski wrote: >> On 12/05/2022 00:06, Marijn Suijten wrote: >>> The pm6125 comes with 9 GPIOs, without holes. >>> >>> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> >>> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> >> >> It's the first version, how did the tag appear here? > > We are friends and review each-others patches offline before spamming > the mailing list with them, to save readers and maintainers here from > pointing out glaring mistakes. I hope this is standard practice in > companies too, or do you recommend aganst us doing this? I personally recommend against it because I prefer public discussions. Especially that such practice in some companies mean that tag is added automatically, without actual review. There are some folks, from other subsystems and architectures, which never publicly replied to anything (so we don't know if they actually exist, what's their credibility, knowledge, experience etc) but they appear on hundreds of reviews. Other people don't mind this practice. Anyway, it's not a stopper from anything, I was wondering. > >>> --- >>> Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml | 2 ++ >>> 1 file changed, 2 insertions(+) >> >> >> This will need fixups or rebasing on my sets of PMIC gpio schema cleanup: > > Ack. > >> https://lore.kernel.org/all/20220507194913.261121-1-krzysztof.kozlowski@linaro.org/ >> https://lore.kernel.org/all/20220508135932.132378-2-krzysztof.kozlowski@linaro.org/ >> >> Bjorn, >> let us know preferred order (who should rebase on who). > > I prefer yours to be applied first, so that I can retest this > patchseries with stricter / more correct dt-bindings introduced by it. > My series can also be resent with the notice that it has already been > rebased on top of your series, after collecting more reviews. Where > necessary, I can review your series too if that helps getting it in > sooner. Sounds good. It's in Bjorn's hands now. :) Best regards, Krzysztof
On Fri, May 13, 2022 at 11:37 AM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > >> This will need fixups or rebasing on my sets of PMIC gpio schema cleanup: > > > > Ack. > > > >> https://lore.kernel.org/all/20220507194913.261121-1-krzysztof.kozlowski@linaro.org/ > >> https://lore.kernel.org/all/20220508135932.132378-2-krzysztof.kozlowski@linaro.org/ > >> > >> Bjorn, > >> let us know preferred order (who should rebase on who). > > > > I prefer yours to be applied first, so that I can retest this > > patchseries with stricter / more correct dt-bindings introduced by it. > > My series can also be resent with the notice that it has already been > > rebased on top of your series, after collecting more reviews. Where > > necessary, I can review your series too if that helps getting it in > > sooner. > > Sounds good. It's in Bjorn's hands now. :) Ugh can I get that with a pull request? Maybe Krzysztof can provide? BTW I have high confidence in you Krzysztof after all your work on the Samsung pin controllers, can you and Bjorn discuss maybe adding you as comaintainer for Qualcomm pin controllers, it's not like Bjorn has too little to do. Yours, Linus Walleij
On 13/05/2022 23:09, Linus Walleij wrote: >>> I prefer yours to be applied first, so that I can retest this >>> patchseries with stricter / more correct dt-bindings introduced by it. >>> My series can also be resent with the notice that it has already been >>> rebased on top of your series, after collecting more reviews. Where >>> necessary, I can review your series too if that helps getting it in >>> sooner. >> >> Sounds good. It's in Bjorn's hands now. :) > > Ugh can I get that with a pull request? Maybe Krzysztof can provide? Ah, I completely forgot that this is actually pinctrl, so it's not Bjorn but you. :) Of course then it can go via Pinctrl tree, in any order you prefer and anyway it's not my call. :) > > BTW I have high confidence in you Krzysztof after all your work on the > Samsung pin controllers, can you and Bjorn > discuss maybe adding you as comaintainer for Qualcomm pin controllers, > it's not like Bjorn has too little to do. Sure, I am happy to help here. I'll talk with Bjorn. Best regards, Krzysztof
On Wed 11 May 15:06 PDT 2022, Marijn Suijten wrote: > The pm6125 comes with 9 GPIOs, without holes. > > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn > --- > Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml > index 22dbcba752d0..ef7a4a9450a4 100644 > --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml > @@ -20,6 +20,7 @@ properties: > - qcom,pm2250-gpio > - qcom,pm660-gpio > - qcom,pm660l-gpio > + - qcom,pm6125-gpio > - qcom,pm6150-gpio > - qcom,pm6150l-gpio > - qcom,pm6350-gpio > @@ -107,6 +108,7 @@ $defs: > description: > List of gpio pins affected by the properties specified in > this subnode. Valid pins are > + - gpio1-gpio9 for pm6125 > - gpio1-gpio10 for pm6150 > - gpio1-gpio12 for pm6150l > - gpio1-gpio9 for pm6350 > -- > 2.36.1 >
On Thu, May 12, 2022 at 12:06 AM Marijn Suijten <marijn.suijten@somainline.org> wrote: > The pm6125 comes with 9 GPIOs, without holes. > > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> This patch 2/7 applied to the pinctrl tree. Yours, Linus Walleij
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml index 22dbcba752d0..ef7a4a9450a4 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml @@ -20,6 +20,7 @@ properties: - qcom,pm2250-gpio - qcom,pm660-gpio - qcom,pm660l-gpio + - qcom,pm6125-gpio - qcom,pm6150-gpio - qcom,pm6150l-gpio - qcom,pm6350-gpio @@ -107,6 +108,7 @@ $defs: description: List of gpio pins affected by the properties specified in this subnode. Valid pins are + - gpio1-gpio9 for pm6125 - gpio1-gpio10 for pm6150 - gpio1-gpio12 for pm6150l - gpio1-gpio9 for pm6350