| Message ID | 20221114-narmstrong-sm8550-upstream-qce-v1-1-31b489d5690a@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | crypto: qcom-qce: add support for SM8550 | expand |
On 16/11/2022 11:23, Neil Armstrong wrote: > From: Abel Vesa <abel.vesa@linaro.org> Subject is precious, so after prefixes (these are good) just "Add interconnects". > > Add 'interconnects' and 'interconnect-names' as optional properties > to the device-tree binding documentation for BAM DMA IP. > > These properties describe the interconnect path between BAM and main > memory and the interconnect type respectively. Where is the type described? What is an "interconnect type"? > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > --- > Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml | 8 ++++++++ > 1 file changed, 8 insertions(+) > Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml b/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml index 003098caf709..ce8bbb2de4c5 100644 --- a/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml +++ b/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml @@ -36,6 +36,14 @@ properties: interrupts: maxItems: 1 + interconnects: + maxItems: 1 + description: + Interconnect path between bam and main memory. + + interconnect-names: + const: memory + iommus: minItems: 1 maxItems: 4