| Message ID | 20230125032728.611640-4-konrad.dybcio@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | RPMPD cleanup + parent PD | expand |
diff --git a/drivers/soc/qcom/rpmpd.c b/drivers/soc/qcom/rpmpd.c index 9a7da7cead9e..a69182618b76 100644 --- a/drivers/soc/qcom/rpmpd.c +++ b/drivers/soc/qcom/rpmpd.c @@ -1027,6 +1027,7 @@ static struct rpmpd sm6375_vddgx_ao; static struct rpmpd sm6375_vddgx = { .pd = { .name = "vddgx", }, .peer = &sm6375_vddgx_ao, + .parent = &sm6125_vddmx.pd, .res_type = RPMPD_RWGX, .res_id = 0, .key = KEY_LEVEL, @@ -1035,6 +1036,7 @@ static struct rpmpd sm6375_vddgx = { static struct rpmpd sm6375_vddgx_ao = { .pd = { .name = "vddgx_ao", }, .peer = &sm6375_vddgx, + .parent = &sm6125_vddmx_ao.pd, .active_only = true, .res_type = RPMPD_RWGX, .res_id = 0,
The GPU core clock requires that both VDDGX and VDDMX domains are scaled at the same rate at the same time (well, MX just before GX but you get the idea). Set MX as parent of GX to take care of that. Suggested-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- drivers/soc/qcom/rpmpd.c | 2 ++ 1 file changed, 2 insertions(+)