@@ -840,7 +840,11 @@ static void dwc3_clk_disable(struct dwc3 *dwc)
static void dwc3_core_exit(struct dwc3 *dwc)
{
- dwc3_event_buffers_cleanup(dwc);
+ unsigned int hw_mode;
+
+ hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0);
+ if (hw_mode != DWC3_GHWPARAMS0_MODE_HOST)
+ dwc3_event_buffers_cleanup(dwc);
usb_phy_set_suspend(dwc->usb2_phy, 1);
usb_phy_set_suspend(dwc->usb3_phy, 1);
@@ -1177,10 +1181,12 @@ static int dwc3_core_init(struct dwc3 *dwc)
if (ret < 0)
goto err3;
- ret = dwc3_event_buffers_setup(dwc);
- if (ret) {
- dev_err(dwc->dev, "failed to setup event buffers\n");
- goto err4;
+ if (hw_mode != DWC3_GHWPARAMS0_MODE_HOST) {
+ ret = dwc3_event_buffers_setup(dwc);
+ if (ret) {
+ dev_err(dwc->dev, "failed to setup event buffers\n");
+ goto err4;
+ }
}
/*
@@ -2008,7 +2014,9 @@ static int dwc3_probe(struct platform_device *pdev)
err5:
dwc3_debugfs_exit(dwc);
- dwc3_event_buffers_cleanup(dwc);
+
+ if (hw_mode != DWC3_GHWPARAMS0_MODE_HOST)
+ dwc3_event_buffers_cleanup(dwc);
usb_phy_set_suspend(dwc->usb2_phy, 1);
usb_phy_set_suspend(dwc->usb3_phy, 1);
On some SoC's like SA8295P where the teritiary controller is host-only capable, GEVTADDRHI/LO, GEVTSIZ, GEVTCOUNT registers are not accessible. Trying to setup them up during core_init leads to a crash. For DRD/Peripheral supported controllers, event buffer setup is done again in gadget_pullup. Skip setup or cleanup of event buffers if controller is host-only capable. Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> --- drivers/usb/dwc3/core.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-)